Yamaha RX-V1500, Руководство по обслуживанию

Страница: 79 / 125

A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V1500/DSP-AX1500
SCHEMATIC DIAGRAM (FUNCTION 1/2)
79
★
All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
★
Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
IC502, 509: LC78212
Analog Function Switch
1
2
3
4
5
6
7
8
30
29
28
27
26
25
24
23
L1
L2
L3
LCOM1
L4
L5
L6
LCOM2
R1
R2
R3
RCOM1
R4
RCOM2
R5
R6
9
10
11
22
21
20
19
16
12
18
17
14
15
13
LEVEL SHIFTER
LATCH
CONTR
OL
SHIFT REGISTER
ZZ
ZZ
ZZ
L7
L8
RES
S
VDD
VSS
VEE
LCOM3 RCOM3
R7
R8
D1
CL
CE
IC503: LC78211
Analog Function Switch
1
2
3
4
5
6
7
8
9
10
11
30
29
28
27
26
25
24
23
22
21
20
19
16
12
18
17
14
15
13
LEVEL SHIFTER
LATCH
CONTR
OL
SHIFT REGISTER
ZZ
ZZ
ZZ
L1
L2
L3
L4
LCOM1
L5
L6
L7
L8
RES
S
VDD
VSS
VEE
LCOM2
LCOM3
R1
R2
R3
R4
RCOM1
RCOM2
RCOM3
R5
R7
R8
D1
CL
CE
R6
IC504, IC510: LC78213
Analog Function Switch
1
2
3
4
5
6
7
8
9
10
11
30
29
28
27
26
25
24
23
22
21
20
19
16
12
18
17
14
15
13
LEVEL SHIFTER
LATCH
CONTR
OL
SHIFT REGISTER
ZZ
ZZ
ZZ
L1
L2
LCOM1
L3
L4
LCOM2
L5
LCOM3
L7
RES
S
VDD
VSS
VEE
L6
LCOM4
R1
R2
RCOM1
R3
R4
R6
RCOM4
RCOM2
RCOM3
R7
D1
CL
CE
R5
I 2 C Bus Interface
Output
Data Latch
8
Output Data
Reset
Input Data
I/O Port
Shift Register
3 SDA
1 SO
16
CS0
15
CS1
14
CS2
12
D7
11
D6
10
D5
9
D4
7
D3
6
D2
5
D1
4
D0
2 SCL
8 GND
13 VDD
IC505: M62320FP
I/O Expander
8
I/O Setting
Register
8
Input/Output
8
I/O Setting
Register
8
8
Power On
Reset
IC508: SN74AHCT126PW
Quadruple Bus Buffer Gates with 3-state Outputs
1A
1Y
2Y
VCC
6A
1
2
3
4 11
2A 6Y
5A
12
13
14
3A
3Y
5Y
4A
5
6
7 4Y 8
9
10
GND
IC522: AN78N05
Voltage Regulator
+
–
1 2 3
Output Pass Transistor Rsc
Excessive Electric
Current Protection
Power Supply
Standard
Voltage
Amp.
Heat
Protection
Starter
Circuit
CPU
EPROM
EXTEND
PORT
Page 84
to VIDEO (2)
C2 Page 84
to VIDEO (2)
C3 Page 77
to DSP
G1 Page 82
to MAIN (1)
E7 Page 81
to OPERATION (1)
H1 Page 81
to OPERATION (2)
E8
Point 3 emitter of Q511
and collector of Q512
POWER ON
(Connect the power cord)
POWER OFF
(Disconnect the power cord)
A Q511 E
B Q512 C
Point 2 Pin 20 of IC520
IC512: MX29F400BTC-70
4Mbit CMOS Flash Memory
Control
Input Logic
Sense
Amplifier
Write State
Machine (WSM)
State
Register
Program/Erase
High Voltage
I/O Buffer
Address
Latch
and
Buffer
CE
OE
WE
Flash
Array
Y-Pass
Gate
X-Decoder
Y-Decoder
A0~A17
Q0~Q15/A-1
PGM
Data HV
Array
Source
HV
Command
Data Latch
Command
Data Decoder
Program
Data Latch
5.2
0
0.1
5.6
0
0
0
3.0
1.5
2.9
3.0
2.6
2.4
4.9
4.7
4.9
4.9
0.1
0.1
4.9
2.7
2.8
2.6
2.1
2.8
2.8
3.9
1.9
2.9
2.3
1.8
2.2
4.9
0 0 0
4.9 0.1 4.9 0.1 4.9 0.1 4.9 4.7 5.2 4.9
0 0 0 0
4.9 2.3
0
2.2 4.9 4.9 5.1
0
5.2
0
4.9
0
0.1 4.9 0 0.1 0.1 5.5
2.6 2.1 2.7 2.5 1.6 2.7 3.0
3.9 2.6 2.8 2.8 2.1 2.6 2.8
0
2.7
4.9 0.1 1.8 4.9 0.1 0.1
4.7 4.9 2.1 2.9 2.5 1.0 1.5 3.0 1.8
0 4.9 4.9 0.1
1.6
10.9
0
0
4.9
3.0
4.9
0.1
4.9
5.7
0
4.9
4.9
4.9
0
4.9
5.0
0.1
0
4.9
4.9
4.9
4.8
4.9
0
4.8
4.9
4.3
5.5
0
4.9
4.9
3.1
2.5
2.4
2.8
5.1
5.1
5.1
5.1
0.1
0.1
0.1
0
4.9
4.9
5.1
0
0.3
5.2
5.2
0.8
0.5
0
0
1.2
5.2
4.9
1.2
8.7
5.8 5.8
5.8 4.9
5.8 5.2
5.2
0.1
0.1
0
4.9
0
0.8
0
5.8
0.8
0
0.4
0.2
0.2
0
0.4
0
5.1
5.1
1.8
4.9
0
3.0
2.9
2.7
2.3
1.6
1.8
2.5
2.2
4.9
2.7
3.1
2.1
2.5
2.6
2.4
1.9
2.8
3.0
0
1.6
3.9
0
0
-11.8
0.1
0.1
0.1
11.4
11.4
0
11.4
-11.8
0.1
0.1
0.1
11.4
11.4
0
11.4
-11.8
0.1
0.1
0.1
11.4
11.4
0
11.4
-11.8
0.1
0.1
0.1
11.4
0
0
11.4
-11.8
0.1
0.1
0.1
11.4
0
0
11.4
0
5.6 5.6 5.2 5.4 0.1 0.1
0.1 0.1 5.5 0 0 5.6 5.6 5.4
5.2
11.5
10.9
10.9
0
10.9
10.9
-11.9
0
10.9
0
10.9
10.9
-11.8
0
10.9
0
10.9
10.9
-11.8
0
10.9
0
10.9
10.9
-11.8
0.8
0.1
0
0.1
6.7
5.2
0.8
7.0
0
0.1
7.6
7.8
2
3
A
B
x: NOT USED
O: USED / APPLICABLE
FUNCTION(1)
MBM29F800