Yamaha RSio64-D, Руководство пользователя

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18
Owner’s Manual
Word Clock
Word Clock
Selecting a word clock
source
Use the WORD CLOCK select key on the front panel to
select the word clock source.
The unit’s clock is synced with the selected word clock
source.
*1 When this is flashing, the u nit u ses the Dante w ord clock to
operate and perform inp u t/o u tp u t.
*2 In order to u se MY 8 -AEB, set AE

RSVD s w itch to the RSVD
position.
*3 If yo u w ant to change the freq u ency of the Dante w ord clock,
u se Dante Controller.
About word clock
• If you select “WCLK IN” or “SLOT1 1/2,” the unit is
automatically set to Enable Sync To External
(synchronize to an external clock). If you select
“DANTE,” Enable Sync To External is automatically
turned off.
If you select “WCLK IN” or “SLOT1 1/2,” and this unit is
a clock slave of the Dante network, the same clock should
be input to the clock master device and to this device.
You can use Dante Controller to check which device is
the current clock master.
• If the word clock signal from the selected word clock
source is cut off, the unit switches to the “DANTE”
setting (Enable Sync To External automatically turns
off), and operates with the clock frequency that is
specified by Dante.
SRC (Sampling
Rate Converter)
• Even if the Mini-YGDAI card installed in a slot is not
synchronized with the Dante network, connection is
possible without having to change the respective clocks.
• The output signal from the slot synchronizes with the
clock from the slot’s input signal or with the clock that is
input via WORD CLOCK IN.
WCLK IN
This is lit if the RSio64-D is u sing the w ord
clock that is b eing inp u t from the rear panel
[WORD CLOCK IN] connector. This flashes if
there is no
v alid w ord clock inp u t
*1
.
SLOT1 1/2
This is lit if the channel 1/2 w ord clock of slot 1
is b eing u sed. This flashes if there is no v alid
w ord clock inp u t
*1
. The channel 7/ 8 w ord clock
is u sed w hen u sing the MY 8 -AEB
*2
.
DANTE
This is lit if the Dante net w ork’s w ord clock
*3
is
b eing u sed. (If no v alid Dante signal is b eing
inp u t, the clock generated b y the internal Dante
mod u le is u sed.)