51
MR816CSX/MR816X
(Fig. 16)
5-5-4. Test contents
(1) The LEDs around the [ASSIGN 1] encoder light
sequentially clockwise repeatedly on entering the test
to be in the clockwise rotation check mode.
(2) Turn the [ASSIGN 1] encoder clockwise and LEDs
will change from automatic sequential lighting to
sequential clockwise lighting in accordance with the
rotation. (One LED lights up when the encoder is
turned by one click.)
(3) Turn the [ASSIGN 1] encoder until the LEDs around
the encoder light sequentially by three turns to enter
the counterclockwise rotation check mode where
the LEDs around the [ASSIGN 1] encoder light
sequentially counterclockwise repeatedly.
(4) Turn the [ASSIGN 1] encoder counterclockwise and
LEDs will change from automatic sequential lighting
to sequential counterclockwise lighting in accordance
with the rotation. (One LED lights up when the
encoder is turned by one click.)
(5) Turn the [ASSIGN 1] encoder until the LEDs around
the encoder light sequentially by three turns followed
by the test of the [ASSIGN 2] encoder. Repeat the
same procedure as the [ASSIGN 1] encoder test for the
[ASSIGN 2] encoder test.
(6) If the clockwise and counterclockwise rotation test of
the [ASSIGN 1] and [ASSIGN 2] encoders are
fi
nished
with the test result of OK, the test will be stopped
automatically followed by the test item selection mode.
If an encoder does not work during the test (LEDs around
the encoder does not light in accordance with the rotation),
the test result is NG. In that case, press the [ASSIGN 2]
encoder to abort the test to go to the test item selection
mode.
5-6.
No. 5 DIGITAL I/O test
5-6-1. Outline
Executes connection checking of the A-BUS signal cable
between the SSP1 and SSP1 SUB, connection checking
of the audio signal cable between the SSP1 and DICEII,
and connection checking of the signal cables between the
DICEII and audio interfaces.
Digital I/O Mode is set to ADAT x4 + S/PDIF(coaxial),
clock source is set to INTERNAL and nominal FS is set to
96 kHz automatically on entering the test.
5-6-2. Main devices to be tested
• A-BUS between the SSP1 and SSP1 SUB
• Audio signal cable between the SSP1, DICEII and FPGA
• [WCLK] terminal
• [S/P DIF] terminal
• [adat] terminal
5-6-3. Preparations
Connect the following terminals with cables to make loop
connections before executing the test.
• OUT and IN of the [WCLK] terminal
• OUT and IN of the [S/PDIF] terminal
• OUT and IN of the [adat] terminal
(Fig. 17)
5-6-4. Test method
Turn the [ASSIGN 1] encoder to turn on the LED
corresponding to the DIGITAL I/O test and then press the
[ASSIGN 1] encoder to execute the test.
The LED for the [ASSIGN 2] encoder corresponding to
the DIGITAL I/O test lights up if the test result is OK or
doesn't light if the result is NG.
(Fig. 18)
ASSIGN 2
ASSIGN 1
4.ENCODER
4.ENCODER
(Test result)
(Test item selection)
WCLK OUT
WCLK IN
S/PDIF OUT
S/PDIF IN
adat OUT
adat IN
ASSIGN 2
ASSIGN 1
5.DIGITAL I/O
5.DIGITAL I/O
(Test result)
(Test item selection)
Содержание MR816CSX
Страница 26: ...26 MR816CSX MR816X DM Circuit Board B B 2NA WK58180 ...
Страница 27: ...27 MR816CSX MR816X Component side 部品側 3 layer 3 層 Scale 70 100 B B 2NA WK58180 ...
Страница 28: ...28 MR816CSX MR816X DM Circuit Board C C 2NA WK58180 ...
Страница 29: ...29 MR816CSX MR816X Component side 部品側 6 layer 6 層 Scale 70 100 C C 2NA WK58180 ...
Страница 30: ...30 MR816CSX MR816X DM Circuit Board D D 2NA WK58180 ...
Страница 31: ...31 MR816CSX MR816X Pattern side パターン側 Scale 70 100 D D 2NA WK58180 ...
Страница 33: ...33 MR816CSX MR816X Pattern side パターン側 G G G G H H PN Circuit Board H H 2NA WM06850 ...