Yamaha HTR-8063, Руководство по обслуживанию

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A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V1067/HTR-8063/RX-A1000
144
NET 2/3
★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked ⚠ and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● ⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
IC515
IC516
IC511
IC512
IC512
IC517
CB512
CB505
CB511
CB504
CB503
IC510
IC510
IC510
IC510
IC513
IC510
IC514
3.3
2.5
2.5
2.6
0
5.1
3.3 1.3
0
3.3
1.3
0
0
5.1
5.1
0
0
3.3
3.3
3.3
0
3.3
1.6
1.7
1.3
0
5.5
5.5
0 3.3
5.0
5.0
3.3
3.3
3.3
3.3
1.8
0
0
0
0
0
0
0
0
0
5.1
5.1
5.5
3.3
3.3
3.3 3.3 0
0
3.3
3.3
3.1
2.3
2.3
2.3
2.3
2.3
1.4
3.3
0
0
0
3.3
0
0
0
3.3
3.3
0
0
3.3
3.3
3.3
0
0 0 0
0
0
0
3.3
3.2 3.2
3.2
0
0 0
0
0
0
0
0
1.6
2.3
3.3
3.3
IC517 : BD6517F-E2
High side switch
Thermal
Shutdown
Charge
Pump Control
Logic Over
Current
Detector 1 CTRLA
Charge
Pump Control
Logic Over
Current
Detector
Oscillator
4 CTRLB
2 FLAGA
3 FLAGB
8 OUTA
5 OUTB
7 VDD
6 GND
IC513 : IP101ALF
Single port 10/100 fast ethernet transceiver
(1) Open-drain output for the PCM1782
NOTE: Signal names in parentheses ( ) are for the PCM1781.
Power Supply
Enhanced
Multilevel
Delta-Sigma
Modulator
V
OUT
L
Oversampling
4 x 8
Digital
Filter
With
Function
Control
Audio
Serial
Port
BCK
LRCK
DATA
Serial
Control
Port
Zero Detect
(TEST)
SCK
System
Clock
Manager
MC (DEMP1)
MS (DEMP0)
Output Amp
and
Low-Pass Filter
MD (MUTE)
DAC
V
COM
System Clock
AGND
V
CC
ZEROR/ZEROA
(1)
(ZEROA)
ZEROL/NA
(1)
Output Amp
and
Low-Pass Filter
DAC
V OUT R
(FMT)
ZEROA
V
OUT
L
V OUT R
V
COM
AGND
V CC
NC
TEST
16
15
14
13
12
11
10
9
FMT
DEMP0
DEMP1
MUTE
SCK
DATA
BCK
LRCK
1
2
3
4
5
6
7
8
IC514 : PCM1781DBQR
Audio digital-to-analog converter
V
DD
CE
Pin No.
1
2
3
4
5
Symbol
V OUT
GND
CE
NC
V DD
Description
Output Pin of Voltage Regulator
Ground Pin
Chip Enable Pin
No Connection
Input Pin
Vref
5 4
2 1
Current Limit
V
OUT
GND
IC511 : R1172H121D-T1-F
CMOS-based positive-voltage regulator IC
V
DD
CE
Pin No.
1
2
3
4
5
Symbol
CE
GND
NC
V DD
V
OUT
Description
Chip Enable Pin ("H" Active)
Ground Pin
No Connection
Input Pin
Output Pin
Vref
4 5
1 2
Current Limit
V
OUT
GND
IC515 : R1172H501D-T1-F
Voltage regulator
IC510 : TC7WH14FK
Triple schmitt inverter
1
2
3
4
8
7
6
5
1A
3Y
2A
GND
VCC
1Y
3A
2Y
4B/5B
Encoder
Scrambler
Mux
TXD RXD
100Mbps
100Mbps
100Mbps
100Mbps
100Mbps
10Mbps
10Mbps
10Mbps
10Mbps
10Mbps
4B/5B
Decoder
Serial to
Parallel
Manchester/
NRZ
Decoder
Descrambler
Serial to
Parallel
Clock
Recovery
Clock
Recovery
Squelch
MLT3/NRZI
Decoder
DSP Engine
MII Registers
Parallel to
Serial
Parallel to
Serial
Auto
Negotiation
MII/SNI/RMII
Interface
100Mbps
100Mbps
NRZI/MLT-3
Encoder
NRZI/Manchester
Encoder
TXO RXI
D/A and Line Driver
100Mbps
10Mbps
10Mbps
10Mbps
100Mbps
100Mbps
100Mbps
100Mbps
100Mbps
10Mbps
5B
5B
To NET 1/3
To NET 3/3
To NET 1/3
To NET 1/3
NETWORK
PHY
DAC
to DIGITAL (1)_W701
Page 130 L8
to FUNCTION (3)_W803
Page 136 B9
to OPERATION (2)_W4501
Page 137 I7
DRAFT