C 1 - 5
F P G A ̲ R A M : O K
C1-5. FPGA
RAM
SDRAM (IC53)’s reading/writing are checked.
C 1 - 6
D I R B U S : O K
C1-6. BUS
DIR1
Communication and bus line connection between microprocessor (IC83) and DIR (IC924) are checked.
OK: No error detected
NG: An error is detected
OK: No error detected
NG: An error is detected
C 1 - 7
D S P B U S : O K
C 1 - 8
E E P R O M : O K
OK: No error detected
NG: An error is detected
OK: No error detected
NG: An error is detected
C1-7. BUS
DSP1
Communication and bus line connection between microprocessor (IC83) and DSP (IC921) are checked.
C1-8. EEPROM
EEPROM (IC82)'s reading is checked.
C 1 - 9
I N V A L I D I T E M
C 1 - 1 0
I N V A L I D I T E M
C1-9. INVALID
ITEM
Not for service.
C1-10. INVALID ITEM
Not for service.
48
RX-V675/HTR-6066/RX-A730/TSR-6750
RX-V675/HTR-6066/
RX-A730/TSR-6750
Содержание HTR-6066
Страница 126: ...MEMO MEMO RX V675 HTR 6066 RX A730 TSR 6750 126 ...
Страница 167: ...167 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 ADVANCED SETUP ...
Страница 168: ...168 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 ...
Страница 181: ...181 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 MEMO ...
Страница 182: ...RX V675 HTR 6066 RX A730 TSR 6750 ...