RX-V795a/RDS/HTR-5170
30
RX-V795a
/ RDS
HTR-5170
IC4 : YSS918-F
Digital Pro-Logic Decoder
Ic : CMOS level input terminal
It : TTL level input terminal
Is : Schmidt trigger input terminal
Ip : Built-in pull up resistance
O : Digital output terminal
O*: 3-state digital output terminal
A : Analog terminal
52
NONPCM
O
non-PCM data detect terminal
53
CRC
O
AC-3 CRC error detect terminal
54
MUTE
O
Auto mute detect terminal
55
KARAOKE
O
AC-3 karaoke data detect terminal
56
SURENC
O
AC-3 2/0 mode dolby surround encode input detect terninal
57
/SDBCK0
O
SDBCK0 inverted clock output terminal
58
RAMA6
O
Address terminal 6 for external SRAM
59
RAMA5
O
Address terminal 5 for external SRAM
60
VSS
Ground terminal (for inner circuit)
61
RAMA4
O
Address terminal 4 for external SRAM
62
/IC
Ics
Initial clear terminal
63
TEST
Test terminal (normally unconnected)
64
RAMA3
O
Address terminal 3 for external SRAM
65
/CSB
Itsp
Chip select input terminal for Sub DSP
66
/CS
Its
Microprocessor interface chip select input terminal
67
SO
O*
Microprocessor interface data output terminal
68
SI
Its
Data input terminal for microprocessor interface and Sub DSP
69
SCK
Its
Clock input terminal for microprocessor interface and Sub DSP
70
RAMA2
O
Address terminal 2 for external SRAM
71
VDD1
+5V terminal (for terminal section)
72
RAMD0
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM0 output)
73
RAMD1
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM1 output)
74
RAMD2
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM2 output)
75
RAMD3
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM3 output)
76
RAMD4
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM4 output)
77
RAMD5
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM5 output)
78
RAMD6
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM6 output)
79
RAMD7
Itp/O Data terminal for external SRAM(external SRAM non-used : STERAM7 output)
80
VSS
Ground terminal (for terminal section)
81
VDD2
+3.3V terminal (for inner circuit)
82
SDWCK0
It
Word clock input terminal for SDIA/SDOA/SDIB/SDOB signal
83
SDBCK0
It
Bit clock input terminal for SDIA/SDOA/SDIB/SDOB signal
84
SDIA0
It
AC-3/DTS bit stream (or PCM) data input terminal to main DSP
85
SDIA1
It
AC-3/DTS bit stream (or PCM) data input terminal to main DSP
86
RAMA1
O
Address terminal 1 for external SRAM
87
RAMA0
O
Address terminal 0 for external SRAM
88
RAMWEN
O
Write enable terminal for external SRAM
89
RAMOEN
O
Output enable terminal for external SRAM
90
VSS
Ground terminal
91
VDD2
+3.3V terminal (for inner circuit)
92
IPORT7
Itp
General purpose input terminal
93
IPORT6
Itp
General purpose input terminal
94
IPORT5
Itp
General purpose input terminal
95
IPORT4
Itp
General purpose input terminal
96
IPORT3
Itp
General purpose input terminal
97
IPORT2
Itp
General purpose input terminal
98
IPORT1
Itp
General purpose input terminal
99
IPORT0
Itp
General purpose input terminal
100
VSS
Ground terminal
No.
Name
I/O
Function
