Yamaha HTR-5150, Руководство по обслуживанию

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31
RX-V595a/HTR-5150/RX-V595aRDS
IC3 : YM3436DK (DIR2)
Digital Format Interface Receiver
Pin Pin
I/O Function
No. Name
1 DAUX I Auxiliary input for audio data
2 HDLT O Asynchronous buffer operation flag (NC)
3 DOUT O Audio data output
4 VFL O Parity flag output (NC)
5 OPT O Fs x 1 Synchronous output signal for DAC (NC)
6 SYNC O Fs x 1 Synchronous output signal for DSP (NC)
7 MCC O Fs x 64Bit clock output
8 WC O Fs x 1Word clock output
9 MCB O Fs x 128Bit clock output
10 MCA O Fs x 256Bit clock output
11 SKSY I Clock synchronization control input
12 XI I
Crystal oscillator connection or external
clock input
13 XO O Crystal oscillator connection
14 P256 O VCO oscillator clock connection (NC)
15 LOCKN O PLL lock flag
16 GND Logic section power (GND)
17 TST2 O PLL time constant switching output (NC)
18 DIM1 I Data input mode selection
19 DIM0 I Data input mode selection
20 DOM1 I Data output mode selection (GND)
21 DOM0 I Data output mode selection (GND)
22 KM1 I Clock mode switching input 1
23 /IC I Initial clear from Sub
µ
-COM
24 VDDA VCO section power (+5V)
25 CTLN I VCO control input N
Pin Pin
I/O Function
No. Name
26 PCO O PLL phase comparison output
27 NC
28 CTLP I VCO control input P (GND)
29 GNDA VCO section power (GND)
30 TSTN I Test terminal. Open for normal use
31 KM2 I Clock mode switching input 2 (GND)
32 KM0 I Clock mode switching input 0 (GND)
33 FS1 O
Channel status sampling frequency display
output 1 (NC)
34 FS0 O
Channel status sampling frequency display
output 0 (NC)
35 CSM I Channel status output method selection(GND)
36 EXTW I
External synchronous auxiliary input word
clock (GND)
37 DDIN I EIAJ (AES/EBU) data input
38 LR O PLL word clock output (NC)
39 VDD Logic section power (+5V)
40 ERR O Data error flag output
41 EMP O
Channel status emphasis control code
output (NC)
42 CDO O
3-wire type microcomputer interface data
output
43 CCK I
3-wire type microcomputer interface clock
output
44 CLD I
3-wire type microcomputer interface load
input
DAUX
HDL
T
DOUT
VFL
OPT
SYNC
MCC
WC
MCB MCA
SKSY
KM1
DOM0
DOM1
DIM0
DIM1
TST2
GND
LOCKN
P256
XO
XI
FS0
CSM
EXTW
DDIN
LR
VDD
ERR
EMP
CDO
CCK
CLD
FS1 KM0 KM2 TSTN GNDA CTLP NC PCO CTLN VDDA /IC
34
35
36
37
38
39
40
41
42
43
44
1 2 3 4 5 6 7 8 9
10 11
23 24 25 26 27 28 29 30 31 32 33
12
13
14
15
16
17
18
19
20
21
22
EIAJ (AES/EBU)
DIGITAL AUDIO
INTERFACE
DECODER
DATA CLOCK
CONTROLLER
SYSTEM
CLOCK
TIMING
GENERATOR
SEL
SERIAL INTERFACE
BUFFER
32 29 15 14 13 12 31 22 11 23
10
9
8
7
6
5
3
2 42 43 44 16 39 30 19 18 1
4
20
21
37
40
35
41
33
34
P/S
S/P
24 26 28 25 17
PLL
38
MCA
KMO
CLD
CCK
CDO
DAUX
DIM1 DIM0
HDLT
GND
VDD
TSTN
VSSA VDDA PCO CTLP CTLN TST2 LR LOCKN P256 XO XI KM2 KM1 SKSY /IC
MCB
WC
MCC
SYNC
OPT
VFL
DOUT
DDIN
ERR
CSM
36
EXTW
EMP
FS1
FS0
DOM1
DOM0
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