Yamaha GX-505, Руководство по обслуживанию

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A B C D E F G H
1
2
3
4
5
6
I J K L M N
7
8
9
10
GX-505/GX-505VCD
■
SCHEMATIC DIAGRAM (GX-505 CD)
* All voltage are measured with a 10M
Ω
/V DC electric volt meter.
* Components having special characteristics are marked
Z
and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
Point
q
(Pin59 of IC5)
V : 2V/div H : 50 nsec/div
DC range 1 : 1 probe
Point w (Pin39 of IC8)
V : 2V/div H : 0.1
µ
sec/div
DC range 1 : 1 probe
IC4 : AN8806SB
Digital Servo Head Amp
36 PDAC
EQ
+
35 PDBD
+
31 PDFR
34
PDF
+
32 PDER
33 PDE
+
+
+
VCBA
+ +
VCBA
29
F
.BAL
7
RF OUT
6
RF–
+
27
FEOUT
28
FE–
+
VCBA
+
VCBA
+
+
30
TBAL
+
24
CR
OSS
+
25
TEOUT
26
TE–
8
RF IN
RF
DETECT
9
C.
AG
C
AGC
10
ARF
17
RF DET
ENV DETECT
11
C
.ENV
12
C
.EA
19
ENV
BDO
OFTR
13 C.SBDO
14 BDO
15 C.SBRT
16 OFTR
18 GND
5 VCC
+
23
TEBPF
+
22
VDET
+
20 VREF
1
PD
4
LDP
3
LDON
2 LD
21 LD OFF
– +
OUT1
–IN1
–VCC
+VCC
OUT2
1
2
3
4 5
+IN1 –IN2
+IN2
– +
6
7
8
IC13, 14 :
µ
PC4570G2
Dual OP-Amp
IC1 : M56748FP
4 Channel BTL Driver
TSD
STAND
BY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
25K
23K
10K
10K
15K
15K
10K 10K 10K 10K
10K 10K
3.6K 10.8K
VCC
OP1
PA PA
PA PA
PA PA
PA
PA
OP1
OP1 OP1
OP1
OP1 OP1
VREF-IN
VREF-OUT
N. C.
GAIN 1
VCTL 1 (–)
VM 1 (–)
VM 1 (+)
GND
VM 2 (+)
VM 2 (–)
VCTL 2 (–)
GAIN 2
N. C.
VCC
REG 5V
STAND BY
SS. GND
STAND BY
GAIN 4
VCTL 4 (–)
VM 4 (–)
VM 4 (+)
GND
VM 3 (+)
VM 3 (–)
VCTL 3 (OUT)
VCTL 3 (–)
VCTL 3 (+)
VCC
REGBASE
IC2, 3 : TA8409S
Full Bridge Motor Driver
9
2 6
7
3
8
5
1
STAND-BY
CIRCUIT
VREF
CIRCUIT
THERMAL
SHUTDOWN
CIRCUIT
VCC VS
VREF
OUT 1
OUT 2
IN 1
IN 2
GND
IC9 : TC74HC125AF
Quad 3 State Bus Buffers
1A
1Y
1C Vcc
4C
1
2
3
4 11 2C
4A
4Y
12
13
14
2A
2Y
3C
3A
5
6
7 GND
3Y 8
9
10
IC10 : TC74HC04AF
Hex Inverters
1A
1Y
2Y
VDD
6A
1
2
3
4 11
2A 6Y
5A
12
13
14
3A
3Y
5Y
4A
5
6
7 VSS 4Y 8
9
10
0V
0V
62
CD HEAD AMP
SPC & DAC
ACT
MOTOR
DRIVE
MOTOR DRIVE
CD CPU
LPF
MUTING
REGULATOR
REGULATOR
CD(Lch)
2.4
2.4 0
1.7 0.6
2.4
2.4 2.4
2.4
2.4 2.4 2.4
2.4 2.4 2.4 2.4 2.4
0.1 3.7
4.8
0
4.8 2.4
2.9
2.4
3.6
1.5
3.8
3.1 3.5 1.2
3.5
0
0
0
3.7
4.3
1.8
2.4
2.4
2.1
2.5
0
0
0
2.5
5.6
2.4
5.6
2.4
2.4
2.5
2.7 0
0
0
~
2.4
2.4
2.4
1.3
2.4
4.8
0
0
0
6.1
~
11.1
0
~
4.8
0
0
4.8
~
0
11.1 ~ 4.0
0
0
6.0
0
0
4.0
2.4
1.3
1.9
4.8
0
0
2.4
2.3
4.8
4.8 4.8
0
~
2.4 2.4
4.8 1.2
0
0.6
0 0
2.4 2.4 2.4 2.4 2.4 2.4 2.4 2.4 2.4 2.4 2.4 2.4 2.4
4.3
4.8
0
~
4.8
0
0
0
0
4.8
~
2.4
~
0
4.9
2.4
2.4
2.4
4.8 5.5
8.0 4.9
7.3
7.3
0
1.2
1.7
1.2 1.2
0
0
0
2.7
0
0
0
0
0
6.2
6.2
6.2
5.6 10.8
4.8
0
4.8
4.8
0
0
4.8
4.8
4.8
0
4.8
4.8
~
~
~ ~
4.8
0
0
0 4.8 4.8
0 0
0
~
4.1 4.1 0 0
~ ~
4.8 0 0 4.8 0 4.8 0 4.8
0
4.8
4.8
0
0
0
0
0
0
0
0
4.8
0
0
0
0
0
0
0
0
0
0
4.1
4.3
2.1
2.3
0
0
0
0
0
0
0
0
0
4.8
0
0
0 0 0
4.8
0 0 0 0 0 0 0 0
4.8 4.8 4.8
0 0
0 0 0 0 0 0 0
0 4.8
4.8
4.8
4.8
-12.0
0
0
0
-12.1
12.2
0
0
0
0
4.8
0
4.8
0
4.8
4.8
q
w
0
5.6
0
0
0
~
5.6
2.4
5.6
5.6
0
0
4.8
12.2
0
0
0
0
0
0
-12.1
0
0
-12.0
0
0
-12.0
0
2.4
0
2.4
2.4
8
3
1
2
6
5
7
4
5 6 3
2 1
4
14
12
13
11
10
9
10
11
9
2
1
8 9
7
3
8
14
10
11
8
2
1
3
5
6
7
4
7
MAIN(1)
P68
A-2
INPUT(1)
P64
A-9
INPUT(3)
P64
C-8