Xycom XVME-560 Скачать руководство пользователя страница 57

Страница: 57 / 70

XVME-560 Manual
September, 1984

BACKPLANE CONNECTOR Pl

The following table lists the PI pin assignments by pin number order. (The connector

consists of three rows of pins labeled rows A, B, and C.)

Table B-2. PI Pin Assignments

Number

Row

Signal
Mnemonic

Row B

Row C

Signal

Mnemonic

D00

BBSY*

DO8

DO1

BCLR*

DO9

DO2

ACFAIL*

Dl0

4 D03

BG0IN* Dll

DO4

BG0OUT*

D12

DO5

BGlIN*

D13

DO6

BGlOUT*

D14

D07

BG2IN*

D15

GND

BG20UT*

G D N

1 0

SYSCLK

BG3IN*

SYSFAIL*

G N D

BG30UT*

BERR*

1 2

DSl*

BRO*

SYSRESET*

1 3

DS0*

BRl*

LWORD*

WRITE*

BR2*

AM5

G N D

BR3*

A23

1 6

DTACK*

AM0

A22

GND

AM1

A21

A S *

AM2

A 2 0

G N D

AM3

Al9

IACK*

G N D

Al8

IACKIN*

SERCLK (1)

Al7

IACKOUT*

SERDAT (1)

Al6

AM4

G N D

A15

A07

IRQ7*

Al4

A06

IRQ6*

Al3

A05

IRQ5*

Al2

A04

IRQ4*

A l l

A03

IRQ3*

A10

2 9

A02

IRQ2*

A09

A01

IRQl*

A08

3 1

-12v

+5V

STDBY

+12v

+5v

B-5

Содержание XVME-560

Страница 1: ......

Страница 2: ......

Страница 3: ......

Страница 4: ......

Страница 5: ......

Страница 6: ...any VMEbus level 11 17 STAT l 20 KHz conversion rate Possible applications for the AIN are l Data acquisition l Closed loop process control Pressure sensing Temperature sensing 1 2 HOW THIS MANUAL IS...

Страница 7: ......

Страница 8: ...YCOM Non Intelligent Kemel The Non Intelligent Kernel is basically the interface to the VMEbus It provides all the necessary circuitry to receive and generate the signals required by the VMEbus specif...

Страница 9: ...resented in Appendix A at the rear of this manual 1 5 SPECIFICATIONS MODULE SPECIFICATIONS Analog Inputs No of Analog Inputs Single ended Differential Input Voltage Ranges jumper selectable Unipolar B...

Страница 10: ...hroughput Delay from External Trigger to Sampling 50 uSec 20K conversions sec 23 us Power Requirements 5V Typ 2 OOA Max 2 50A Environmental Temperature Operating Non Operating 0 to 69 40 to 85 Humidit...

Страница 11: ...Specifications Double Height VME board 233 35 mm x 160 mm 9 2 x 6 3 Fully compatible with VMEbus standard Al 6 D16 Data Transfer Bus slave I 1 I 7 STAT Programmable Vector Base address jumper selecta...

Страница 12: ...h the following features Data Transfer Bus Arbiter System Clock driver System Reset driver Bus time out module An example of such a controller subsystem is the XYCOM XVME 010 System Resource Module SR...

Страница 13: ...per Switch Use JlB Enables IACKIN INACKOUT daisy chain this is a hardwired jumper and is always installed J2A J2B J3A J3B J4A J4B J5 J6 J7 J8 J9 Memory mapped operation Short I O operation These jumpe...

Страница 14: ......

Страница 15: ......

Страница 16: ...ust be set to open If jumper J2B is installed Switch 8 must be set to closed The Standard I O Architecture recommends that the AIN operate within the Short I O Address Space in order to take advantage...

Страница 17: ...rivilege Mode Selected Closed Open Supervisory or Non Privileged Supervisory Only 2 4 4 Address Modifier Reference The following table Table 2 5 indicates the actual VMEbus Address Modifier code that...

Страница 18: ...enable the IACKIN IACKOUT daisy chain CAUTION The jumper shorting IACKIN to IACKOUT for the AIN s slot in the backplane must be removed or the AIN may be damaged 2 4 6 Interrupt Level Switches Figure...

Страница 19: ...of arbitration are not used by the AIN and are hardwired together on the module to allow the BGxIN BGxOUT Daisy Chain to pass through the backplane slot occupied by the AIN In each slot of the VMEbus...

Страница 20: ...ll J13 and J14 select the input mode Table 2 7 Analog Input Options Option Jumpers Inserted Single ended Input JI0B J13 JI4A Differential Input Jl0A Jll Jl4B 2 4 10 Analog Input Range The AIN provides...

Страница 21: ......

Страница 22: ...XVME 560 Manual September 1984 Table 2 10 Grounding Jumper Options Input Jumpers Jumpers Mode Inserted Removed Single ended J16 J15 Differential J15 J16 2 11...

Страница 23: ......

Страница 24: ...log gnd 3 1 Channel 18 6 Analog gnd 31 Channel 50 7 Channel 2 32 Channel 26 7 Channel 34 32 Channel 58 8 Channel 10 33 Analog gnd 8 Channel 42 33 Analog gnd 9 Analog gnd 34 Channel 27 9 Analog gnd 34...

Страница 25: ...Chan 20 Lo 38 Chan 28 Hi 14 Ghan 4 Hi 39 Analog gnd 14 Chan 20 Hi 3 9 Analog gnd 15 Analog gnd 40 Chan 13 Hi 15 Analog gnd 40 Chan 29 Hi 16 Chan 5 Hi 41 Chan 13 Lo 16 Chan 21 Hi 41 Chan 29 Lo 17 Chan...

Страница 26: ...n the plastic guides so that the solder side is facing to the left and the component side is facing to the right refer to Figure 2 6 3 Push the card slowly toward the rear of the chassis until the con...

Страница 27: ......

Страница 28: ...ort I O Address Space It can be located at any one of 64 Base Addresses at 1K intervals within this address space The base address is selected via the switches described in Section 2 4 1 When located...

Страница 29: ......

Страница 30: ......

Страница 31: ...reset except for the Control Status register The A D converter is not reset so a minimum of 25 usec must pass before a conversion can be started This bit enables interrupts when set to a logic 1 Not...

Страница 32: ......

Страница 33: ......

Страница 34: ......

Страница 35: ...al data format is first determined by the choice of the input scaling range Unipolar e g 0 to 5V or Bipolar e g 5 to 5V see Section 2 14 If the input scaling range is unipolar then a straight binary d...

Страница 36: ...1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 5V i 2 LSB b 3 7 A D CONVERSION MODES The AIN may operate in four possible A D conversion modes They are 0 Random Channel a single A D conversion is performed on any cha...

Страница 37: ...gain by writing to the Channel Gain register base 85H 3 To initiate the first conversion perform a dummy Read base 87H or force a conversion by writing a logic one to bit 7 of the control register 4 R...

Страница 38: ...ersion is started when the external trigger line is disabled after previously being enabied Rising edge triggers conversion 1 gi ms Figure 3 6 Alternate External Trigger Pulse Procedure 1 Connect the...

Страница 39: ......

Страница 40: ...800H 0801H OFFEH OFFFH Bipolar 2 s Complement Offset Binary OOOOH 0001H 07FEH 07FFH 4 l The gain is adjusted by removing J15 and J16 and then applying the full scale voltage of that particular range m...

Страница 41: ...dard a full scale value minus 1 l 2 LSB must be applied to channel 0 The programmable gain should be set to unity gain for this procedure The gain potentiometer R17 is adjusted until readings toggle e...

Страница 42: ......

Страница 43: ...pability of the module to interrupt the system Communication between Modules How master host processors and intelligent I O modules communicate through shared global memory or the dual access RAM on t...

Страница 44: ...ides the correct address configuration to allow each module address to begin on a 1K boundary Non intelligent XVME modules allow the use of six base address jumpers representing bits Al0 A15 and thus...

Страница 45: ...area of the module I O Interface Block base address 82H roughly 12OF is module specific and it varies in size from one module to the next It is in this area that the module holds specific I O status...

Страница 46: ......

Страница 47: ......

Страница 48: ......

Страница 49: ...e if the board is operating properly On non intelligent XVME I O modules the status control register is used to indicate the state of the front panel LEDs and to set and verify module generated interr...

Страница 50: ......

Страница 51: ...rnels common from module to module Each different module type consists of a standard kernel combined with module dependent application circuitry Module standardiza tion results in more efficient modul...

Страница 52: ......

Страница 53: ...23 Three state driven l C 15 30 address lines that specify a memory address Signal Name and Description AC FAILURE open collector driven signal which indicates that the AC input to the power supply i...

Страница 54: ...s occurred and the bus cycle must be aborted BUS GRANT 0 3 IN Totem pole driven signals generated by the Arbiter or Requesters Bus Grant In and Out signals form a daisy chained bus grant The Bus Grant...

Страница 55: ...th between the DTB master and slave GROUND INTERRUPT ACKNOWLEDGE Open coliector or three state driven signal from any Master proces sing an interrupt request Routed via the back plane to Siot 1 where...

Страница 56: ...may be generated by any module on the VMEbus SYSRESET lC 12 SYSTEM RESET Open collector driven signal which when low will cause the system to be reset WRITE 1A 14 WRITE Three state driven signal that...

Страница 57: ...O9 3 DO2 ACFAIL Dl0 4 D03 BG0IN Dll 5 DO4 BG0OUT D12 6 DO5 BGlIN D13 7 DO6 BGlOUT D14 8 D07 BG2IN D15 9 GND BG20UT GDN 1 0 SYSCLK BG3IN SYSFAIL 11 GND BG30UT BERR 1 2 DSl BRO SYSRESET 1 3 DS0 BRl LWOR...

Страница 58: ......

Страница 59: ......

Страница 60: ......

Страница 61: ......

Страница 62: ......

Страница 63: ......

Страница 64: ......

Страница 65: ......

Страница 66: ......

Страница 67: ...QUICK REFERENCE GUIDE EVEN ODD Base OOH Reserved 3EH 3FH 40H 41H Undefined 7EH Status Control 82H 84H 86H Interrupt Vector Channel Gain Data High Byte Data Low Byte 7FH 81H 83H 85H 87H Undefined 3FEH...

Страница 68: ...as a result of reading an analog signal see Table 2 9 These jumpers select one of the five input scaling ranges used see Table 2 8 Jl0A Jl0B J11 J13 J14A J14B These jumpers select between single ende...

Страница 69: ...XVME 560Manual September 1984 Table D 2 Interrupt Level Options Switches 3 2 1 Level No Level selected Level 1 Level 2 Level 3 Level 4 Level 5 Level 6 Level 7 NOTE Open Logic 1 Closed Logic 0 D 3...

Страница 70: ......

Результаты поиска

Содержание XVME-560

Отзывы:

Похожие инструкции для XVME-560

Бренды по названию

Популярные бренды

Xycom XVME-560, Руководство пользователя

Результаты поиска

Содержание XVME-560

Отзывы:

Похожие инструкции для XVME-560

Бренды по названию

Популярные бренды