Xycom XVME-202, Руководство пользователя

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XVME-202
Manual
December, 1986
3.4 RESET
The
PAMUX
unit has a Reset line that is used for turning off the relays on all
PAMUX units on the bus. On power-up and in response to SYSRESET, the Reset is
asserted on the XVME-202 which causes the attached PAMUX units to be reset.
The user must deactivate the Reset line by performing a write operation to Base
a C1H.
To activate RESET, perform a write operation to Base Address +
81H.
The XVME-202 uses a active low Reset line. Refer to the
PAMUX
manual for
information on how to select the correct Reset polarity on the
PAMUX
unit.
3.5 READ/WRITE
To read a bank it is necessary to indicate the base address (for example, 1 0 0 0 H
plus the bank address.
Using the Memory Map (Figure 3-2), if the user needed to
read bank 12, they would simply perform a read operation from location 1019H.
This is also true if the user wished to write to bank 12.
When the user is writing to a relay bank that has input and output modules, the
user MUST make sure that zeros are written to the input module positions.
If the
user write’s a 1 to an input module by mistake, the module will read back as being
active even if it is inactive.
3.6 VMEbus ACCESS TIME
,
The
PAMUX
unit requires a read/write strobe pulse width of 2 uSec. It then
requires another 2 uSec before another read/write strobe can be generated.
Therefore, on a read cycle, DTACK will be asserted 2.5 uSec. after the start of the
cycle, but the XVME-202 cannot be accessed for another 1.5 uSec. after DTACK.
During a write cycle, the data is latched on the module and
DTACK
will be
generated within 500 nSec. If an attempt is made to access the
XVME-202
during
this time, DTACK will be delayed further. Table 3-1 shows the DTACK access time.
Table 3-1. DTACK Access Time
Description
DSO
ASSERTED
TO DTACK ASSERTED (READ)
DSO ASSERTED TO DTACK ASSERTED (WRITE)
DSO NEGATED TO DTACK NEGATED
Typical Maximum ,
2500nS 2700nS
500nS 600nS
65nS 1 OOnS
3-4