Xycom XVME-202, Руководство пользователя

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XVME-202 Manual
December, 1986
2.5 JKl Pin Assignments
The XVME-202 interconnects to the PAMUX bus via
JKl
on the front panel. The
PAMUX bus has 8 data lines, 6 address lines, a read strobe line, a write strobe
line, and a reset line. Table 2-4 shows the standard PAMUX pin out.
NOTE
The JKI connector is directly compatible with the PAMUX
I/O systems, flat cables can be connected directly from
the XVME-202 to the PAMUX system without the need for a
transition interface.
JKl Pin Signal
1
A0
3 A l 3 5
5
A2
7
A3
9 A 4
11
A5
1 3 WRITE STROBE
1 5
READ STROBE
49
RESET
Table 2-4. PAMUX ‘in out
, JKl Pin
33
3 7
39
4 1
43
45
47
Signal
D 7
D 6
D 5
D 4
D3
D 2
Dl
D0
NOTE: All even numbered pins on connector JKl are tied
ground.
2.6 MODULE INSTALLATION
to
logic
XYCOM VME modules are designed to comply with all physical and electrical
VMEbus backplane specifications.
The XVME-202 PAMUX Interface Module is a
single-high, single-wide VMEbus module, and as such, only requires the P1
backplane.
2-6