10. WIEGAND PROTOCOL DESCRIPTION
The data is sent over the lines DATA 0 for the logic “0” and DATA 1 for the logic “1”. Both lines use inverted logic, meaning that a
pulse low on DATA 0 indicates a “0” and a pulse low on DATA 1 indicates a “1”.When the lines are high, no data is being sent. Only 1
of the 2 lines ( DATA 0 / DATA 1 ) can pulse at the same time.
Example: data 0010....
D0
D1
5V
0V
100 us
1 ms
0
0
1
0
5V
0V
Data bit 0 = approximately 100 us (microseconds)
Data bit 1 = approximately 100 us (microseconds)
Time between two data bits: approximately 1 ms (millisecond). Both data lines (D0 and D1) are high.
Description for the 26 bits Wiegand format
Each data block consists of a first parity bit P1, a fixed 8 bits header, 16 bits of user code and a 2nd parity bit P2. Such a data block
is shown bellow:
Parity bit (bit 1) + 8 bits header +
16 bits user code = 2 bytes + Parity bit (bit 26)
P1
P2
XXXXXXXX
XXXX
YYYY YYYYYYYY
Example:
170
31527
1
0
1 0 1 0 1 0 1 0 0 1 1 1
1 0 1 1 0 0 1 0 0 1 1 1
Note:
Parity bits are calculated as follows:
P1 = even parity calculated over the bits 2 to 13 ( )
X
P2 = odd parity calculated over the bits 14 to 25 ( )
Y
E A A A A A A A A B B B B B B B B B B B B B B B B O
Even
Parity
Bit
Odd
Parity
Bit
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