20
6.0.7
Status Byte Register and Service Request Enable Register
Figure 7 shows the Status Byte Register and the Service Request Enable Register.
The six individual condition inputs of the Status Byte Register are:
6.0.7.1 Error/Event Queue
When the Error/Event Queue contains one or more entries, this bit will be set.
6.0.7.2 Questionable Status
If a Questionable Event has occurred and is enabled to feed the Status Byte Register, this bit will be set.
6.0.7.3 Message Available (MAV)
As PLS600 does not initiate any message, this bit is not used.
6.0.7.4 Standard Event Status
If a Standard Event has occurred and is enabled to feed the Status Byte Register, this bit will be set.
6.0.7.5 Summary Bit (RQS)
Any of the four functioning bits of the Status Byte Register being set and enabled (in the Service Request Enable Register) will
cause this bit to be set.
6.0.7.6 Operation Status
If an Operation Event has occurred and is enabled to feed the Status Byte Register, this bit will be set.
Figure 7. Status Byte Register
