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6.0.3.6 SCPI Access
Access to the Operation Status Register is via the following commands:
STATus:OPERation[:EVENt]?
Rtn Event register
STATus:OPERation:CONDition?
Rtn Condition register
STATus:OPERation:ENABle <value>
Set Enable register
STATus:OPERation:ENABle?
Rtn Enable register
6.0.4
Standard Event Status Register
Figure 6 shows the Standard Event Status Register.
The Standard Event Status Register takes the standard SCPI structure. The eight individual condition inputs are:
6.0.4.1 Operation Complete
This bit is not used by PLS600.
6.0.4.2 Request Control
This bit is not used by PLS600.
6.0.4.3 Query Error
This bit is not used by PLS600.
6.0.4.4 Device Specific Error
This bit is set if a Device Specific Error occurs. These include all Questionable Register events and Error Queue Overflow.
6.0.4.5 Execution Error
This bit is not used by PLS600.
Figure 6. Standard Event Status Register
