XMOS xCORE-Analog sliceKIT, Руководство по оборудованию

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xCORE-Analog sliceKIT Hardware Manual 10/33
2.7 Reset
The whole system is held in reset until all power supplies are stable, and reset is
connected to all Slice Cards so any circuitry on them can be reset.
It also indicates to the sliceCARDs that their power input is stable. The reset from
the xTAG resets the whole system, if required for debugging.
2.8 Clocking
There are two sources for the system clock: an on-board 25MHz oscillator or
the CLK signal from the
Chain
Connector. The system clock source is selected
automatically according to the presence signals on the
Chain
connector.
This means the system clock from a Master Core Board is fed automatically to all
of the slave Core Boards so the whole system will operate synchronously.
The system clock is also fed to each of the sliceCARD Slots.
2.9 Testpoints
Each xCORE I/O signal is also available on a 0.1” header, next to the Slot that it is
connected to.
These connections can be used to connect an oscilloscope or logic analyser, or for
interconnection of signals for advanced development work.
The signals are identified on the silkscreen layer of the sliceKIT Core Board, the
table below lists their relationship to the internal ports.
XS1-A16 Pin Slot PCIE Function
X0D0 TRIANGLE B2 P1A0
X0D1 STAR A8 P1B0
MIXED SIG B15
CHAIN B10
X0D2 STAR B6 P4A0 P8A0 P16A0 P32A20
CHAIN A7
X0D3 STAR B7 P4A1 P8A1 P16A1 P32A21
CHAIN A6
X0D4 STAR B9 P4B0 P8A2 P16A2 P32A22
CHAIN A11
X0D5 STAR B11 P4B1 P8A3 P16A3 P32A23
CHAIN A9
X0D6 STAR A9 P4B2 P8A4 P16A4 P32A24
CHAIN B11
X0D7 STAR A11 P4B3 P8A5 P16A5 P32A25
(continued)
XM005221A