4. Carrier Board Installation
The Carrier Board is installed into the backplane of the SPEA 3030 bed-of-nails tester. It requires separate
connections for power and USB. Both of the required cables are supplied with the Carrier Board.
The Carrier Board is designed to be powered by a 24 Volt supply.
Please refer to the SPEA use and maintenance manual for detailed instructions on the physical installation.
5. Connecting a UUT to the Carrier Board
UUTs are connected to the Carrier Board using the 72-pin system connector (J1). As shown in
Table 1
below, this connector is split equally between the two XJLink2-3030 modules with pins 1-36 used for the
connections to the module 1 and pins 37-72 used for the connections to the module 2.
The two sets of system connector ground pins (one set for each module) are electrically isolated from one
another. If both modules are being used, all of the ground pins will be connected together via the Carrier
Board system ground when the tests are running.
When fabricating the connections from the UUT to the system connector, use twisted pair cables. Each
active signal is located next to a ground signal on the system connector to make this easy to implement.
To ensure optimum signal integrity all of the ground wires from the twisted pairs should be connected to
ground test points as close to the active signals as possible on the UUT. If this is not done, large loop
areas can occur – see
Signal Integrity in Test Fixtures (PDF)
for more details.
page 5 of 8
XJTAG-3030-Guide-20C-01
www.xjtag.com
SPEA 3030 XJLink2 Carrier Board
.
User Guide
XJTAG pin mapping
configuration pin
SPEA system connector (J1)
XJLink2-3030 (module 1)
XJLink2-3030 (module 2)
GND
Pin 10
2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22,
23, 26, 27, 30, 31, 34, 35
38, 39, 42, 43, 46, 47, 50, 51, 54, 55,
58, 59, 62, 63, 66, 67, 70, 71
GND
Pin 20
Signal 1
Pin 1
1 (IO1_1 - RFU)
37 (IO2_1 - RFU)
Signal 2
Pin 2
4 (IO1_2)
40 (IO2_2)
Signal 3
Pin 3
5 (IO1_3)
41 (IO2_3)
Signal 4
Pin 4
8 (IO1_4)
44 (IO2_4)
Signal 5
Pin 5
9 (IO1_5)
45 (IO2_5)
Signal 6
Pin 6
12 (IO1_6)
48 (IO2_6)
Signal 7
Pin 7
13 (IO1_7)
49 (IO2_7)
Signal 8
Pin 8
16 (IO1_8)
52 (IO2_8)
Signal 9
Pin 9
17 (IO1_9)
53 (IO2_9)
Signal 10
Pin 11
20 (IO1_11)
56 (IO2_11)
Signal 11
Pin 12
21 (IO1_12)
57 (IO2_12)
Signal 12
Pin 13
24 (IO1_13)
60 (IO2_13)
Signal 13
Pin 14
25 (IO1_14)
61 (IO2_14)
Signal 14
Pin 15
28 (IO1_15)
64 (IO2_15)
Signal 15
Pin 16
29 (IO1_16)
65 (IO2_16)
Signal 16
Pin 17
32 (IO1_17)
68 (IO2_17)
Signal 17
Pin 18
33 (IO1_18)
69 (IO2_18)
Signal 18
Pin 19
36 (IO1_19)
72 (IO2_19)
X
JL
in
k2
-3
03
0
B
an
k
1
X
JL
in
k2
-3
03
0
B
an
k
2
Table 1 – Main system connector J1 pinout (connects to UUT)
