Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
518
UG586 November 30, 2016
Chapter 4:
LPDDR2 SDRAM Memory Interface Solution
3. Click
Next
to proceed to the
Project Name
page (
). Enter the
Project Name
and
Project Location
. Based on the details provided, the project is saved in the
directory.
X-Ref Target - Figure 4-2
Figure 4-2:
Create a New Vivado Tool Project
X-Ref Target - Figure 4-3
Figure 4-3:
Project Name