80
www.xilinx.com
Spartan-3A/3AN FPGA Starter Kit Board User Guide
UG334 (v1.1) June 19, 2008
Chapter 10:
Digital-to-Analog Converter (DAC)
R
Interface Signals
Table 10-1
lists the interface signals between the FPGA and the DAC. The SPI_MOSI,
DAC_OUT, and SPI_SCK signals are shared with other devices on the SPI bus. The
DAC_CS signal is the active-Low slave select input to the DAC. The DAC_CLR signal is
the active-Low, asynchronous reset input to the DAC.
The serial data output from the DAC is primarily used to cascade multiple DACs. This
signal can be ignored in most applications although it does demonstrate full-duplex
communication over the SPI bus.
SPI Communication Details
Figure 10-3
shows a detailed example of the SPI bus timing. Each bit is transmitted or
received relative to the SPI_SCK clock signal. The bus is fully static and supports clock
rates up to the maximum of 50 MHz. However, check all timing parameters using the
LTC2624 data sheet if operating at or close to the maximum speed.
Figure 10-2:
Digital-to-Analog Connection Schematics
Header J5
DAC A
12
DAC B
12
DAC C
12
12
SPI_MOSI
DAC_CS
SPI_SCK
DAC_CLR
CS/LD
SDI
SCK
CLR
SDO
DAC_OUT
(V7)
(AB14)
(AA20)
(AB13)
(W7)
3.3V
A
B
C
D
GND
VCC
REF A
REF B
REF C
REF D
VOUTA
VOUTB
VOUTC
VOUTD
FPGA
DAC D
LTC 2624 DAC
SPI Control Interface
(3.3V)
UG334_c10_02_052407
Programmable reference
supplied by adjustable
LP3906 regulator, IC18.
3.3V by default.
Table 10-1:
DAC Interface Signals
Signal
FPGA Pin
Direction
Description
SPI_MOSI
AB14
FPGA
Æ
DAC
Serial data: Master Output, Slave Input
DAC_CS
W7
FPGA
Æ
DAC
Active-Low chip-select. Digital-to-analog
conversion starts when this signal returns
High.
SPI_SCK
AA20
FPGA
Æ
DAC
Clock
DAC_CLR
AB13
FPGA
Æ
DAC
Asynchronous, active-Low reset input
DAC_OUT
V7
FPGA
Å
DAC
Serial data from the DAC
Содержание Spartan-3A DSP FPGA Series
Страница 1: ...R Spartan 3A 3AN FPGA Starter Kit Board User Guide UG334 v1 1 June 19 2008...
Страница 8: ...8 www xilinx comSpartan 3A 3AN FPGA Starter Kit Board User Guide UG334 v1 1 June 19 2008 R...
Страница 114: ...114 www xilinx comSpartan 3A 3AN FPGA Starter Kit Board User Guide UG334 v1 1 June 19 2008 Chapter 13 DDR2 SDRAM R...
Страница 140: ...140 www xilinx comSpartan 3A 3AN FPGA Starter Kit Board User Guide UG334 v1 1 June 19 2008 Chapter 17 Voltage Supplies R...