26
ML605/SP605 Hardware Tutorial
UG669 (v3.0) March 15, 2011
System Design Flow
Adding IP from the Xilinx IP Catalog
Adding the AXI Central DMA Core
1.
The XPS project should already be opened (from the previous section of this
document). In the Project Information area of the XPS GUI, click the
IP Catalog
tab.
2.
Expand the
DMA and Timer
list by clicking the respective
+
. The list of DMA and
Timer cores is now displayed.
Note:
The Description field can be made wider by placing the cursor near the divider between
the fields until it changes into two vertical bars with arrows pointing away on each side.
3.
Right-click the
AXI Central DMA
and select
Add IP,
as shown in
Note:
Warning messages in the console window about the axi_cdma_0 or other cores added
into the system not being accessible from any processor in the system can be safely ignored.
Connecting bus interfaces are discussed later in this tutorial.
4.
The XPS Core Config dialog box is automatically invoked. This dialog box sets
parameters and AXI interconnect settings for the core (such as register slicing).
In the
User/All
tab, make the following settings:
a.
Select the check box for
AXI Lite Clock is Async
.
b. For
Maximum AXI Burst Length to use
, select
128
from the drop-down menu to
maximize performance of the core.
c.
Select the check box for
Include Data Realignment
(see
).
X-Ref Target - Figure 14
Figure 14:
Adding the AXI_CDMA Core
UG669_15_021711
