PCM-MIO-A-1/General Operation
v1.0
www.winsystems.com
Page 8
5.
General Operation
5.1
System Block Diagram
The PCM-MIO-A-1 utilizes a Lattice MachXO2 FPGA to communicate
between the PC/104 ISA bus and the ADCs, DACs, and 48 DIO. The analog
16-bit inputs provide up to 100 Ksps, and ±25 V protection via the Linear
Technology LTC1859 ADC converters. The DACs provide 12-bit outputs via
the Linear Technology LTC2704.
6.
Specifications
The PCM-MIO-A-1 adheres to the following specifications and
requirements.
Feature
Specification
Electrical
V
CC
+5 V ±5% @ 500 mA (typ.), all outputs unloaded
Models
PCM-MIO-A-1
Includes: ADC, DAC, DIO
PCM-MIO-A-AD-1
Includes: ADC, DIO
Absolute Maximums A/D input protection:
•
Board off:
20 k
Ω
input impedance, up to + 20 V
•
Board on:
25 k
Ω
input impedance, up to + 25 V
Mechanical
Dimensions
3.6 in x 3.8 in (90 mm x 96 mm)
Weight
3.20 oz. (90.72 g)
PCB Thickness
0.078 in. (1.98 mm)