
Panel Specification
6.2 POWER ON/OFF SEQUENCE
Timing Specifications:
0 < t1
≦
10 msec
0 < t2
≦
50 msec
0 < t3
≦
50 msec
t4
≧
1 sec
t5
≧
100 msec
t6
≧
100 msec
Note (1) Please avoid floating state of interface signal at invalid period.
Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD V
DD
to 0 V.
Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the
interface signal is valid. The Backlight inverter power must be turned off before the power supply
for the logic and the interface signal is invalid.
- Power Supply
for LCD, V
DD
- Interface Signal
(LVDS Signal of
Transmitter), V
I
- Power for Lamp
Restart
Power On
Power Off
0V
0V
10%
t6
t5
t4
t3
t2
t1
10%
90%
10%
90%
Valid Data
ON
F
F
O
F
F
O
Содержание MCH1505S-XN25C
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