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VB7009 User Manual
58
6.12.
PCIE Bus Control
PCIE Root Port
PCIE Target Link Speed
PCIE ASPM Function
PCIE Bus Control
[Enable]
[Auto]
Maximum Payload Size
[Auto]
[Auto]
PCIE PE0 Control
PCIE Hot-Reset Enable
[Enable]
[Disabled]
PCIE Root-Port-Reset Enable
[Disabled]
Phoenix - AwardBIOS CMOS Setup Utility
Item Help
Menu Level
ESC: Exit
F5: Previous Values
: Move
F10: Save
Enter: Select
+/-/PU/PD: Value
F1: General Help
F7: Optimized Defaults
Figure 55: Illustration of the PCIE Bus Control screen
6.12.1.
PCIE Root Port
Settings: [Disabled, Enabled]
6.12.2.
PCIE Target Link Speed
Settings: [Auto, Force Gen1]
6.12.3.
PCIE PE0 Control
Settings: [Disabled, Enabled]
6.12.4.
PCIE Hot-Reset Enable
Settings: [Disabled, Enabled]
6.12.5.
PCIE Root-Port-Reset Enable
Settings: [Disabled, Enabled]
6.12.6.
Maximum Payload Size
Settings: [Auto, 128 Byte]
6.12.7.
PCIE ASPM Function
Settings: [Force Disable, Auto]
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