VIA Technologies VAB-1000, Руководство пользователя

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VAB VAB VAB VAB----1000 User Manual 1000 User Manual 1000 User Manual 1000 User Manual
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2.2.10. SPI and GPIO Combination Pin Header
The SPI and GPIO combination pin header block labeled as “CN9” is used for
connecting SPI device, and General Purpose Input and Output. The pinout of
the pin header is shown below.
Figure
Figure Figure
Figure 19
19 19
19: SPI and GPIO pin header diagram
: SPI and GPIO pin header diagram : SPI and GPIO pin header diagram
: SPI and GPIO pin header diagram
Pin
Pin Pin
Pin Signal
Signal Signal
Signal Pin
Pin Pin
Pin Signal
Signal Signal
Signal
1 VDD3318_DVP (for GFX GPIO
Power)/100mA
2 VDD50_SUS/0.5A
3 GND 4 VDD33 For GPIO Power)/0.5A
5 GFX_GPIO11 (Graphics GPIO11) 6 SPI1_CLK : SPI1 Host Interface Clock
GPIO5
7 GFX_GPIO12 (Graphics GPIO12) 8 SPI1_MISO : SPI1 Host Interface Master
Input, Slave Output GPIO6
9 GFX_GPIO13 (Graphics GPIO13) 10 SPI1_MOSI :SPI1 Host Interface Master
Output, Slave Input
GPIO7
11 GFX_GPIO14 (Graphics GPIO14) 12 SPI1 Host Interface Slave Select Active-
low. GPIO8
13 GND 14 GND
Table
Table Table
Table 18
18 18
18: SPI and GPIO pin header pinout
: SPI and GPIO pin header pinout : SPI and GPIO pin header pinout
: SPI and GPIO pin header pinout