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Award BIOS Setup Utility
DRAM Clock
This field is used to select the clock speed of the DIMM.
By SPD
The EEPROM on a DIMM has SPD (Serial
Presence Detect) data str ucture that stores
information about the module such as the
memor y type, memor y size, memor y speed, etc.
When this option is selected, the system will run
according to the information in the EEPROM.
100 MHz
The memor y clock speed will run at 100MHz.
133 MHz
The memor y clock speed will run at 133MHz.
DRAM Timing
This field is used to select the timing of the DRAM.
By SPD
The EEPROM on a DIMM has SPD (Serial
Presence Detect) data str ucture that stores
information about the module such as the
memor y type, memor y size, memor y speed, etc.
When this option is selected, the system will run
according to the information in the EEPROM.
Manual
It allows you to configure the fields that follow.
The system will run according to the settings in
these fields.
Performance
The system will r un in its best performance,
however compatibility problems may occur with
some DRAMs. If you encounter any problems,
please set this field to “By SPD” or “Manual”.
SDRAM C AS Latency
The default setting is 3 which is 3 clock cycles for the CAS
latency.
Bank Interleave
The options are 2 Bank, 4 Bank and Disabled.
Precharge to Active (Trp)
The options are 2T and 3T.
