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VIA EPIA-M920 User Manual
14
2.2.2.
LVDS Panel Connector
The VIA EPIA-M920 has two LVDS panel connectors: LVDS1 and LVDS2. The LVDS1 panel connector is
controlled by VIA VX11H chipset while the LVDS2 panel connector is controlled by VT1636 LVDS
transmitter. The pinouts of the LVDS panel connectors are shown below.
LVDS1
1
1
LVDS2
1
1
Figure 16: LVDS panel connector diagram
LVDS1
LVDS2
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
M1 GND
M1 GND
2
PVDD1
1
NC
2
PVDD2
1
-A4_L
4
PVDD1
3
NC
4
PVDD2
3
A4_L
6
GND
5
GND
6
GND
5
GND
8
GND
7
NC
8
GND
7
-A5_L
10 -LD1C0
9
NC
10 -A0_L
9
A5_L
12 +LD1C0
11 GND
12 A0_L
11
GND
14 GND
13 NC
14 GND
13
-A6_L
16 -LD1C1
15 NC
16 -A1_L
15
A6_L
18 +LD1C1
17 GND
18 A1_L
17
GND
20 GND
19 NC
20 GND
19
-CLK2_L
22 -LD1C2
21 NC
22 -A2_L
21
CLK2_L
24 + LD1C2
23 GND
24 A2_L
23
GND
26 GND
25 NC
26 GND
25
-A7_L
28 -LCLK1
27 NC
28 -CLK1_L
27
A7_L
30 + LCLK1
29 NC
30 CLK1_L
29
NC
32 GND
31 GND
32 GND
31
NC
34 -LD1C3
33 NC
34 -A3_L
33
NC
36 + LD1C3
35 NC
36 A3_L
35
NC
38 LVDSPCLK
37 NC
38 DVPSPCLK
37
NC
40 LPDSPD
39 NC
40 DVPSPD
39
NC
Table 13: LVDS panel connectors pinouts