VersaLogic STD32 VL-1225, Справочное руководство

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VL-1225/6 Analog Input/Output Board
7-1
Reference
Specifications
Specifications are typical at 25°C with 5.0V supply unless otherwise noted.
ANALOG INPUT (VL-1225 and VL-1226)
Number of Channels: 16 single-ended or 8 differential
Range: 0 to +10V, ±5V, ±10V
Resolution:
10 bits (1024 counts) RTI-1225/6 Compatible Mode
11 bits (2048 counts) VL-1225/6 Extended Mode
Conversion Time: 25
µ
s + settling time
Settling Time: 15
µ
s
Throughput: 25,000 channels/sec
Overvoltage Protection:
±35V with power on
±20V with power off
Impedance: 1 x 10
8
Ω
min.
Data Format: Binary, offset binary, or two’s complement
Common Mode Voltage (CMV): ±10V min
Common Mode Rejection (CMR): 60 dB
Linearity: ±½ LSB
Differential Nonlinearity: ±½ LSB
Temperature Coefficient:
Gain ±50 ppm/°C of FSR
Offset ±25 ppm/°C of FSR
Addressing: 16 bits + MEMEX or IOEXP
Mapping: 8-byte memory or I/O block on any 8-byte boundary
Size: Meets all STD 32 Bus mechanical specifications
Storage Temperature: –40° to +75 °C
Free Air Operating Temperature: 0° to +65 °C
Power Requirements:
5V ±5% @ 480 ma typ. (VL-1225)
5V ±5% @ 430 ma typ. (VL-1226)
ANALOG OUTPUT (VL-1225 only)
Number of Channels: 2
Resolution: 8 bits (256 counts)
Data Format: Binary, offset binary, or two’s complement
Range: 0 to +10V, ±5V, ±10V @ 5 ma (max)
Settling Time: 25
µ
s (to ±½ LSB)
Linearity: ±½ LSB
Differential Nonlinearity: ±½ LSB
Temperature Coefficient:
Gain ±50 ppm/°C of FSR
Offset ±30
µ
V/°C
BUS COMPATIBILITY (VL-1225 and VL-1226)
STD 80: Full compliance, all bus speeds
STD Z80: Full compliance, all bus speeds
STD 32: I/O slave, SA8-I, IX
Reference