
Chapter 2 __________________________________________________________ Product Overview
VAISALA ________________________________________________________________________ 7
CHAPTER 2
PRODUCT OVERVIEW
This chapter explains the operation and basic structure of the Vaisala
Main Processor Unit MPU112.
Introduction to MPU112 Main Processor Unit
The MPU112 is an E1-sized module that controls the system functions
and external communication. It comprises an E1-sized main circuit
board and a Computer Module which is installed on the Carrier Board.
The Computer Module is a PC-compatible core module. It contains a
PC-compatible CPU and basic PC interfaces, from which the COM1
and COM2 communication ports are used in MPU112.
The Carrier Board contains an Ethernet communication interface, a
Compact Flash type disk memory, a Programmable Logic Device
(PLD), two serial communication channels (in addition to COM1 and
COM2), ARCNET type local area network, and a battery for the
calendar clock of the CPU.
The Ethernet communication interface consists of an Ethernet
controller and a five channel Ethernet switch. The four switch
channels are available for external connections at 10 or 100 Mbit/s
line speed.
The Compact Flash disk memory is a 1 GB ATA/IDE compatible
device.
All timing and interface logic functions are implemented in
Programmable Logic Device (PLD). The configuration (program)
code of the PLD is stored in the program memory of the CPU, and the
configuration takes place during system start-up.
Содержание MPU112
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