DNA/DNR-IRIG-650 IRIG Timing Layer
Chapter 3
43
Programming with the Low Level API
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Vers:
4.6
Date: March 2019
DNx-IRIG-650 Chap3x.fm
© Copyright 2019
United Electronic Industries, Inc.
case EV650_ERROR:
// data contains content of four uint32 status registers:
// CT650_STS, CT650_TKSTS, CT650_TDSTS, CT650_SWG_STS
reenable_errors = TRUE;
break;
default:
// should never execute
break;
}
}
}
Since
DqCmdReceiveEvent()
is generic, it does not take care of converting
received event from network (big endian) to host (little endian on Intel platform)
automatically, so you needs to supply byte-order conversion yourself.
For example:
void ntoh_pEv650(pEV650_ID pEv650) {
uint32 i;
pEv650->chan = ntohl(pEv650->chan);
pEv650->evtype = ntohl(pEv650->evtype);
pEv650->size = ntohl(pEv650->size);
pEv650->tstamp = ntohl(pEv650->tstamp);
for (i = 0; i < pEv650->size/sizeof(uint32); i++)
pEv650->data[i] = ntohl(pEv650->data[i]);
return;
}
Note that all events configured by using
DqAdv650SetEvents()
are received
as
EV650_EVENT.
Also,
error
event is configured to be fired once. If it is received, it means that
the input doesn’t receive proper timecode or has not synchronized with the input
timecode yet. Once a proper time is received, error events are re-enabled (again
to be received once upon error). Content of four status registers is returned upon
error:
•
CT650_STS
– general status
•
CT650_TKSTS
– timekeeper status
•
CT650_TDSTS
– time decoder status
•
CT650_SWG_STS
– time generator status
Please see meaning of these status bits in
powerdna.h
.