ZED-F9K - Integration manual
It is recommended to have the possibility to pull the SAFEBOOT_N pin low in the application. This
can be provided using an externally connected test point or a host I/O port.
3.5.4 TIMEPULSE
The ZED-F9K high precision receiver provides a time pulse on the TIMEPULSE pin.
More information about the time pulse feature and its configuration can be found in the
section.
3.5.5 TX_READY
This feature enables each port to define a corresponding pin, which indicates if bytes are ready to be
transmitted. A listener can wait on the TX-READY signal instead of polling the I2C or SPI interfaces.
The CFG-TXREADY message lets you configure the polarity and the number of bytes in the buffer
before the TX-READY signal goes active. By default, this feature is disabled. For USB, this feature
is configurable but might not behave as described below due to a different internal transmission
mechanism. If the number of pending bytes reaches the threshold configured for this port, the
corresponding pin will become active (configurable active-low or active-high), and stay active until
the last bytes have been transferred from software to hardware.
This is not necessarily equal to all bytes transmitted, i.e. after the pin has become inactive,
up to 16 bytes might still need to be transferred to the host.
The TX_READY pin can be selected from all PIOs which are not in use (see UBX-MON-HW3 in the
ZED-F9K Interface Description [
] for a list of the PIOs and their mapping). Each TX_READY pin is
exclusively associated to one port and cannot be shared. If PIO is invalid or already in use, only the
configuration for the specific TX_READY pin is ignored, the rest of the port configuration is applied
if valid. The acknowledge message does not indicate if the TX-READY configuration is successfully
set, it only indicates the successful configuration of the port. To validate successful configuration
of the TX_READY pin, the port configuration should be read back and the settings of TX-READY
feature verified (will be set to disabled/all zero if the settings are invalid).
The threshold when TX_READY is asserted should not be set above 2 kB as it is possible that the
internal message buffer limit is reached before this. This results in the TX_READY pin never being
set as the messages are discarded before the threshold is reached.
3.5.5.1 Extended TX timeout
If the host does not communicate over SPI or I2C for more than approximately 2 seconds, the device
assumes that the host is no longer using this interface and no more packets are scheduled for
this port. This mechanism can be changed by enabling "extended TX timeouts", in which case the
receiver delays idling the port until the allocated and undelivered bytes for this port reach 4 kB. This
feature is especially useful when using the TX-READY feature with a message output rate of less
UBX-20046189 - R01
3 Receiver functionality
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C1-Public
Early production information
