TOBY-L2 and MPCI-L2 series - System Integration Manual
UBX-13004618 - R28
Design-in
Page 109 of 164
2.6.3
DDC (I
2
C) interface
☞
The I
2
C bus compatible Display Data Channel interface is not available on MPCI-L2 series modules.
2.6.3.1
Guidelines for DDC (I
2
C) circuit design
☞
I
2
C bus function is not supported by TOBY-L2 series modules “00”, “01”, “60” and TOBY-L201-02S
product versions: the pins should not be driven by any external device.
The DDC I
2
C-bus master interface can be used to communicate with external I
2
C-bus slaves as an
audio codec. Beside the general considerations reported below, see the section
for an application
circuit example with an external audio codec I
2
C-bus slave.
To be compliant with the I
2
C bus specifications, the module bus interface pads are open drain output
and pull up resistors must be mounted externally. Resistor values must conform to I
2
C bus
: for example, 4.7 k
resistors can be commonly used. Pull-ups must be connected
to a supply voltage of 1.8 V (typical), since this is the voltage domain of the DDC pins which are not
tolerant to higher voltage values (e.g. 3.0 V).
☞
Connect the DDC (I
2
C) pull-ups to the V_INT 1.8 V supply source, or another 1.8 V supply source
enabled after V_INT, as any external signal connected to the DDC (I
2
C) interface must not be set
high before the switch-on of the V_INT supply of DDC (I
2
C) pins, to avoid latch-up of circuits and
let a proper boot of the module.
The signal shape is defined by the values of the pull-up resistors and the bus capacitance. Long wires
on the bus will increase the capacitance. If the bus capacitance is increased, use pull-up resistors with
nominal resistance value lower than 4.7 k
, to match the I
2
C bus specifications
regarding rise and
fall times of the signals.
☞
Capacitance and series resistance must be limited on the bus to match the I
2
C specifications (1.0
µ
s is the maximum allowed rise time on the SCL and SDA lines): route connections as short as
possible.
☞
If the pins are not used as DDC bus interface, they can be left unconnected.
☞
ESD sensitivity rating of the DDC (I
2
C) pins is 1 kV (Human Body Model according to JESD22-A114).
Higher protection level could be required if the lines are externally accessible and it can be achieved
by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible
points.
2.6.3.2
Guidelines for DDC (I
2
C) layout design
The DDC (I
2
C) serial interface requires the same consideration regarding electro-magnetic
interference as any other digital interface. Keep the traces short and avoid coupling with RF line or
sensitive analog inputs, since the signals can cause the radiation of some harmonics of the digital
data frequency.
