Ublox SARA-N4 Series, Руководство по системной интеграции

Страница: 96 / 157

SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R11 Design-in Page 96 of 157
Follow these guidelines connecting the module to a SIM connector implementing SIM presence detection:
 Connect the UICC / SIM contacts C1 (VCC) to the VSIM pin of the module.

Connect the UICC / SIM contact C7 (I/O) to the SIM_IO pin of the module.

Connect the UICC / SIM contact C3 (CLK) to the SIM_CLK pin of the module.

Connect the UICC / SIM contact C2 (RST) to the SIM_RST pin of the module.
 Connect the UICC / SIM contact C5 (GND) to ground.

Connect one pin of the normally-open mechanical switch integrated in the SIM connector (as the SW2
pin in
Figure 39 ) to the GPIO5 input pin, providing a weak pull-down resistor (e.g. 470 k

, as R2 in
Figure 39 ).
 Connect the other pin of the normally-open mechanical switch integrated in the SIM connector (SW1
pin in
Figure 39 ) to V_INT 1.8 V supply output by means of a strong pull-up resistor (e.g. 1 k  , as R1
in Figure 39 )

Provide a 100 nF bypass capacitor (e.g. Murata GRM155R71C104K) at the SIM supply line ( VSIM ), close
to the related pad of the SIM connector, to prevent digital noise.

Provide a bypass capacitor of about 22 pF to 47 pF (e.g. Murata GRM1555C1H470J) on each SIM line
(
VSIM , SIM_CLK , SIM_IO , SIM_RST ), very close to each related pad of the SIM connector, to prevent RF
coupling especially in case the RF antenna is placed closer than 10 - 30 cm from the SIM card holder.
 Provide a low capacitance (i.e. less than 10 pF) ESD protection (e.g. Tyco Electronics PESD0402-140) on
each externally accessible SIM line, close to each related pad of the SIM connector. The ESD sensitivity
rating of SIM interface pins is 1 kV (HBM according to JESD22-A114), so that, according to the EMC/ESD
requirements of the custom application, higher protection level can be required if the lines are externally
accessible.
 Limit capacitance and series resistance on each SIM signal to match the requirements for the SIM
interface (18.7 ns = maximum rise time on
SIM_CLK , 1.0
µ
s = maximum rise time on SIM_IO and
SIM_RST ).
SARA-R4/ N4
41 VSIM
39 SIM _IO
38
SIM _CLK
40
SIM _RST
4
V_INT
42 GPIO5
SIM CARD
HOLDER
C
5 C
6 C
7
C
1 C
2 C
3
SIM Card
Bot t om View
(cont act s side)
C1
VPP (C6)
VCC (C1)
IO (C7)
CLK (C3)
RST (C2)
GND (C5)
C2 C3 C5
J 1
C4
SW 1
SW 2
D1 D2 D3 D4 D5 D6
R2
R1
C
8
C
4
TP
Figure 39: Application circuit for the connection to a single removable SIM card, with SIM detection implemented
Reference Description Part Number - Manufacturer
C1, C2, C3, C4 47 pF Capacitor Ceramic C0G 0402 5% 50 V GRM1555C1H470JA01 - Murata