NINA-B2 series - System integration manual
UBX-18011096 - R05
System description
Page 7 of 35
C1- Public
Digital I/O interfaces reference voltage (VCC_IO)
All modules in the NINA-B2 series provide an additional voltage supply input for setting the I/O voltage
level.
The separate
VCC_IO
pin enables integration of the module in many applications with different
voltage levels (for example, 1.8 V or 3.3 V) without any level converters. The NINA-B2 modules support
only 3.3 V as IO voltage level currently.
VCC application circuits
The power for the NINA-B2 series modules is provided through the VCC pins, which can be one of the
following:
•
Switching Mode Power Supply (SMPS)
•
Low Drop Out (LDO) regulator
The SMPS is the ideal choice when the available primary supply source has higher value than the
operating supply voltage of the NINA-B2 series modules. The use of SMPS provides the best power
efficiency for the overall application and minimizes current drawn from the main supply source.
⚠
While selecting SMPS, ensure that AC voltage ripple at switching frequency is kept as low as
possible. Layout shall be implemented to minimize impact of high frequency ringing.
The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage
where the typical 85-90% efficiency of the switching regulator leads to minimal current saving. Linear
regulators are not recommended for high voltage step-down as they will dissipate a considerable
amount of energy.
DC/DC efficiency should be evaluated as a tradeoff between active and idle duty cycle of the specific
application. Although some DC/DC can achieve high efficiency at extremely light loads, a typical
DC/DC efficiency quickly degrades as idle current drops below a few mA greatly reducing the battery
life.
It is considered as a best practice to have decoupling capacitors on the supply rails close to the
NINA-B2 series module, although depending on the design of the power routing on the host system,
capacitance might not be needed.
See the NINA-B2 series data sheet [2]
for electrical specifications.
1.6
System function interfaces
Boot strapping pins
There are several boot configuration pins available on the module that must have the correct settings
during boot (see Table 2). The boot strap pins are configured to the default state internally on the
module and must NOT be configured externally.
During boot, pin 32 controls if additional system information should be transmitted on the UART
interface during startup. After the system has booted, it is reconfigured to
SPI_CS,
the SPI chip select
signal.
During boot, pin 36 controls the voltage level of the internal flash during startup. After the system
has booted, it is reconfigured to the SPI slave data output signal,
SPI_MISO
. It must NOT be pulled
down by an external MCU or circuitry.
