LISA-U2 series - System Integration Manual
UBX-13001118 - R19
Early Production Information
System description
Page 85 of 175
To be compliant to the I
2
C bus specifications, the module bus interface pads are open drain output and pull up
resistors must be mounted externally. Resistor values must conform to the
I
2
C bus specifications
[8]: for example,
4.7 k
resistors can be commonly used. Pull-ups must be connected to a supply voltage of 1.8 V (typical), since
this is the voltage domain of the DDC pins which are not tolerant to higher voltage values (e.g. 3.0 V).
Connect the DDC (I
2
C) pull-ups to the
V_INT
1.8 V supply source, or another 1.8 V supply source enabled
after
V_INT
(e.g., as the GNSS 1.8 V supply present in Figure 47 application circuit), as any external signal
connected to the DDC (I
2
C) interface must not be set high when the module is in power-down mode,
when the external reset is forced low and during the module power-on sequence (at least until the switch
on of the
V_INT
supply of DDC pins), to avoid latch-up of circuits and let a proper boot of the module.
See Figure 18 for power-on sequence description and timings.
DDC Slave-mode operation is not supported, the module can act as master only.
Two lines, serial data (
SDA
) and serial clock (
SCL
), carry information on the bus.
SCL
is used to synchronize data
transfers, and
SDA
is the data line. Since both lines are open drain outputs, the DDC devices can only drive them
low or leave them open. The pull-up resistor pulls the line up to the supply rail if no DDC device is pulling it
down to GND. If the pull-ups are missing,
SCL
and
SDA
lines are undefined and the DDC bus will not work.
The signal shape is defined by the values of the pull-up resistors and the bus capacitance. Long wires on the bus
will increase the capacitance. If the bus capacitance is increased, use pull-up resistors with nominal resistance
value lower than 4.7 k
, to match the
I
2
C bus specifications
[8] regarding rise and fall times of the signals.
Capacitance and series resistance must be limited on the bus to match the I
2
C specifications (1.0 µs is the
maximum allowed rise time on the
SCL
and
SDA
lines): route connections as short as possible.
If the pins are not used as DDC bus interface, they can be left unconnected.
1.10.2.2
Connection with u-blox GNSS receivers
General considerations
LISA-U2 modules support these GPS aiding types:
Local aiding
AssistNow Online
AssistNow Offline
AssistNow Autonomous
The embedded GPS aiding features can be used only if the DDC (I
2
C) interface of the cellular module is
connected to the u-blox GNSS receivers.
The GPIO pins of LISA-U2 series modules can handle:
GNSS receiver power-on/off (“GNSS supply enable” function provided by
GPIO2
)
The wake up from idle-mode when the GNSS receiver is ready to send data (“GNSS data ready” function
provided by
GPIO3
)
The RTC synchronization signal to the GNSS receiver (“GNSS RTC sharing” function provided by
GPIO4
)
The
GPIO2
is by default configured to provide the “GNSS supply enable” function (parameter <gpio_mode> of
AT+UGPIOC command set to 3 by default), to enable or disable the supply of the u-blox GNSS receiver
connected to the cellular module by the AT+UGPS command. The pin is set a
Output / High, to switch on the u-blox GNSS receiver, if the parameter <mode> of AT+UGPS command is
set to 1
Output / Low, to switch off the u-blox GNSS receiver, if the parameter <mode> of AT+UGPS command is set
to 0 (default setting)
The pin must be connected to the active-high enable pin (or the active-low shutdown pin) of the voltage
regulator that supplies the u-blox GNSS receiver on the application board.
