AMY-6M - Hardware Integration Manual
UBX-17021971 – R07
Design-in
Page 17 of 57
2.2
System functions
2.2.1
EXTINT - external interrupt pin
EXTINT0
and
EXTINT1
are external interrupt pins. It can be used for wake-up functions in low-power modes.
See the
u-blox 6 Receiver Description including Protocol Specification
2.2.2
System monitoring
The u-blox
-
6 GPS Receiver provides System Monitoring functions that allow the operation of the embedded
processor and associated peripherals to be supervised. These System Monitoring functions are being output as
part of the UBX protocol, class ‘MON’.
Please refer to the
u-blox 6 Receiver Description including Protocol Specification
For more information on
UBX messages, serial interfaces for design analysis and individual system monitoring functions.
2.2.3
Interference Monitor
New with firmware version 7 and above is the Interference Monitor feature. In contrast to the CW Jamming
Indicator, it is designed to detect both broad band and narrow band jammers. The receiver monitors the
background noise and reports any abnormal behavior.
For more information about the Interference Monitor refer to the
u-blox 6 Receiver Description including
Protocol Specification
2.3
Interfaces
u-blox AMY-6 receivers offer a number of different interfaces that can be used to connect to a host CPU: UART,
USB, DDC (I
2
C compatible), and SPI. Depending on the application any of these interfaces may be selected.
For debugging purposes it is recommended to have a second interface (unused by the actual application)
available on test-points.
New with firmware version 7 and above is the feature that each interface can define a corresponding pin, which
indicates if bytes are ready to be transmitted. The Tx-ready pin can be selected from all PIOs which are not in
use. Each Tx-ready pin is exclusively for one interface and cannot be shared.
See u-blox 6 Receiver Description including Protocol Specification
[2] for description of the communication
protocols available at these interfaces and the respective configuration options.
2.3.1
UART
UART 1 (RxD1/TxD1) is the default serial interface. It supports data rates from 4.8 kbit/s to 115.2 kbit/s. An
interface based on RS232 standard levels (+/- 12 V) can be realized using external level shifters such as Maxim
MAX3232.
For the default settings on the messages on UART1 see the
AMY-6M Data Sheet
Hardware handshake signals and synchronous operation are not supported.
2.3.2
USB
The u-blox 6 USB interface supports the full-speed data rate of 12 Mbit/s.
2.3.2.1
USB external components
The USB interface requires some external components in order to implement the physical characteristics required
by the USB 2.0 specification. These external components are shown in Figure 11 and listed in Table 5.
In order to comply with USB specifications, VBUS must be connected through an LDO (U4) to pin
VDD_USB
of
the module.
