ZED-F9P - Integration manual
exceeded, new messages to be sent will be dropped. To prevent message loss, the baud rate and
communication speed or the number of enabled messages should be carefully selected so that the
expected number of bytes can be transmitted in less than one second.
3.6.2 I2C interface
An I2C interface is available for communication with an external host CPU or u-blox cellular modules.
The interface can be operated in slave mode only. The I2C protocol and electrical interface are
fully compatible with the fast-mode of the I2C industry standard. Since the maximum SCL clock
frequency is 400 kHz, the maximum transfer rate is 400 kb/s. The SCL and SDA pins have internal
pull-up resistors which should be sufficient for most applications. However, depending on the speed
of the host and the load on the I2C lines additional external pull-up resistors may be necessary.
To use the I2C interface D_SEL pin must be left open.
In designs where the host uses the same I2C bus to communicate with more than one u-
blox receiver, the I2C slave address for each receiver must be configured to a different value.
Typically most u-blox receivers are configured to the same default I2C slave address value. To
poll or set the I2C slave address, use the CFG-I2C-ADDRESS configuration item (see ZED-F9P
Interface description [
]).
The CFG-I2C-ADDRESS configuration item is an 8-bit value containing the I2C slave address
in 7 most significant bits, and the read/write flag in the least significant bit.
3.6.2.1 I2C register layout
The I2C interface allows 256 registers to be addressed. As shown in
, only three of these
are currently implemented.
The data registers 0 to 252 at addresses 0x00 to 0xFC contain information reserved, the result from
their reading is currently undefined. The data registers 0 to 252 are 1 byte wide.
At addresses 0xFD and 0xFE it is possible to read the currently available number of bytes.
The register at address 0xFF allows the data stream to be read. If there is no data awaiting
transmission from the receiver, then this register delivers value 0xFF, which cannot be the first byte
of a valid message. If the message data is ready for transmission, the successive reads of register
0xFF will deliver the waiting message data.
Do not use registers 0x00 to 0xFC. They are reserved for future use and they do not
currently provide any meaningful data.
UBX-18010802 - R08
3 Receiver functionality
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Early production information