(TRACE_D1)
(TRACE_CLK)
TO FTDI CHIP
LEVEL SHIFTERS
TO INTERFACE MCU
PRODUCT VARIANTS
BOM B311: NINA-B311 WITH ANTENNA PIN:
BOM B312: NINA-B311 WITH INTERNAL ANTENNA:
MOUNT NINA-B312 ON M1
J10 DNI
MOUNT NINA-B311 ON M1
ANTENNA U.FL CONNECTOR
(TRACE_D3)
CURRENT MEASUREMENT AND NINA POWER SUPPLY
(QSPI_D3)
(TRACE_D2)
DNI = NOT MOUNTED
(BLUE/SWO/
TRACE_D0)
(GREEN
/ BOOT)
(RED)
(QSPI_CLK)
(QSPI_CS)
(QSPI_D2)
NOTE!
(QSPI_D1)
NFC ANTENNA
CONNECTOR
JUMPER HEADERS USED TO CONNECT
GPIOS TO VARIOUS BOARD FUNCTIONS
ALL POSISTIONS MOUNTED BY DEFAULT
(QSPI_D0)
MEASUREMENTS AT J22
POPULATING R6 WILL ALLOW CURRENT
SUPPLY AT J22 (ON NINA-B3 VCC_IO = VCC)
REMOVING R4 WILL ALLOW SEPARATE VCC_IO
LEDS ETC. IF SUPPLYING VCC FROM BATTERY
REMOVING JUMPER AT POS 2-4 WILL DISCONNECT
DEFAULT JUMPER CONFIG: POS 1-3 AND 2-4
Wed Jan 24 15:28:27 2018
PAGE 1 OF 6
EVB-NINA-B3
AJOH
u-blox AG
$Change: 113979
A
02
UART_DSR
SWITCH_2
UART_DTR
UART_RTS_I
GPIO_34
BOM_B312=DNI
ADD2GND
GND=GND
UART_CTS
UART_RTS
RESET_N
GPIO_42
GPIO_25
GPIO_24
GPIO_1
GPIO_3
GPIO_4
DNI
0
GPIO_27
0R
0
GPIO_28
NFC_1
0R
SWDCLK
USB_DM
GPIO_2
GPIO_5
SWITCH_1
GPIO_47
GPIO_52
USB_DP
0R
DNI
VDD_NINA
VCC_IO
VDD_IO
DNI
GPIO_49
GPIO_48
VCC_IO
GPIO_41
SWDIO_LVL
SWDCLK_LVL
SWO_LVL
RESET_N_LVL
GPIO_43
GPIO_35
1
0
%
1
0
0
N
UART_TXD
UART_RXD
ANT
330P
10%
0
0R
10%
330P
GPIO_37
1
0
0
N
1
0
0
N
1
0
%
1
0
%
GPIO_38
GPIO_40
GPIO_39
10%
GPIO_8
0R
0
GPIO_33
GPIO_32
VBUS_NINA
VCC
GPIO_36
DNI
330P
NFC_2
1
0
0
N
1
0
0
N
UART_RXD_I
1
0
%
1
0
%
UART_DTR_I
BLUE
SWDIO_I
UART_TXD_I
UART_CTS_I
UART_DSR_I
1
0
0
N
GND=GND
1
0
%
UART_DTR_LVL
UART_DSR_LVL
UART_RTS_LVL
UART_CTS_LVL
UART_TXD_LVL
UART_RXD_LVL
GPIO_45
RESET_N_I
NINA MODULE
UART_RXD
UART_RTS_I
UART_CTS_I
UART_TXD_I
UART_RXD_I
UART_DSR
UART_DTR
UART_RTS
UART_CTS
UART_TXD
SWDIO_I
RESET_N_I
GPIO_1
GREEN
RED
SWDIO
RESET_N
SWDCLK
GPIO_8
SWITCH_1
UART_DSR_I
SWDIO
SWDCLK_I
BLUE
UART_DTR_I
1
0
0
N
GPIO_46
GPIO_51
GPIO_50
GPIO_44
1
0
%
SWDCLK_I
VDD_IO
VDD_MCU
GPIO_29
VCC
6
5
4
3
2
1
9
7
5
1
3
12
10
8
6
11
2
4
9
7
5
1
3
12
10
8
6
11
2
4
B4
A1
B1
B2
A3
A4
A2
B3
VCCB
OE
VCCA
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GND_6
GPIO_7
GPIO_8
VCC_IO
VCC
GPIO_16
GPIO_17
GPIO_18
RESET_N
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
VBUS
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
B8
B7
B6
B5
B4
B3
A8
A7
A6
A5
A4
A3
OE
VCCB GND
VCCA
A1
A2
B2
B1
S
W
D
C
L
K
G
N
D
_
1
2
A
N
T
G
N
D
_
1
4
S
W
D
IO
G
P
IO
_
4
3
G
P
IO
_
4
4
G
P
IO
_
4
5
G
P
IO
_
4
6
G
N
D
_
2
6
G
P
IO
_
2
7
G
P
IO
_
2
8
G
P
IO
_
2
9
G
N
D
_
3
0
G
P
IO
_
4
7
G
P
IO
_
4
8
G
P
IO
_
4
9
G
P
IO
_
5
0
G
P
IO
_
5
1
G
P
IO
_
5
2
G
N
D
_
5
3
U
S
B
_
D
P
U
S
B
_
D
M
J22
J9
J19
U9
M1
U4
R4
R6
R22
R18
R24
R23
ti_txs0104epwr
ublox_nina_b3
TXS0108
DRAWING TITLE :
1
4
3
2
1
6
5
4
3
2
1
12
11
10
9
8
7
6
5
4
3
2
1
12
11
10
9
8
7
6
5
4
3
2
1
14
1
8
10
11
12
13
5
4
3
2
9
10
31
19
42
41
40
39
38
37
36
35
34
33
32
25
24
23
22
21
20
18
17
16
8
7
5
4
3
2
1
6
19
2
10
11
12
13
14
15
16
17
18
20
9
8
7
6
5
4
3
1
4
3
2
1
C
5
2
C
4
7
C
4
8
C
1
8
C
1
7
C
1
9
C
2
0
J10
C51
C25
C24
J11
E
D
C
B
A
A
E
D
C
B
1
2
3
4
5
6
7
8
3
4
5
6
7
8
2
U-BLOX AG
DATE :
SWITZERLAND
1
THALWIL
GROUP :
DESIGN BY :
ICM:
PCB_VER.:
VERSION :
PROJECT :
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
5
4
5
5
1
5
1
1
5
2
5
1
5
0
4
9
4
8
4
7
4
6
4
5
4
4
4
3
2
9
2
8
2
7
5
3
3
0
2
6
1
4
1
2
1
3
A3