67
Checkpoint Code
Description
A2h
Displaying any soft errors next.
A3h
The soft error display has completed. Setting the keyboard typematic rate
next.
A4h
The keyboard typematic rate is set. Programming the memory wait states
next.
A5h
Memory wait state programming is over. Clearing the screen and enabling
parity and the NMI next.
A7h
NMI and parity enabled. Performing any initialization required before
passing control to the adaptor ROM at E000 next.
A8h
Initialization before passing control to the adaptor ROM at E000h
completed. Passing control to the adaptor ROM at E000h next.
A9h
Returned from adaptor ROM at E000h control. Performing any
initialization required after the E000 option ROM had control next.
AAh
Initialization after E000 option ROM control has completed. Displaying the
system configuration next.
ABh
Building the multiprocessor table, if necessary.
ACh
Uncompressing the DMI data and initializing DMI POST next.
B0h
The system configuration is displayed.
B1h
Copying any code to specific areas.
00h
Code copying to specific areas is done. Passing control to INT 19h boot
loader next.
The system BIOS passes control to different BUSes at the
following checkpoints:
Checkpoint Code
Description
2Ah
Initializing the different bus system, static, and output devices, if present.
38h
Initialized bus input, IPL, and general devices, if present.
39h
Displaying bus initialization error messages, if any.
95h
Initializing bus adaptor ROMs from C8000h through D8000h.
SYSTEM
