User's Manual l TQMa335xL UM 0101 l © 2019, TQ-Systems GmbH
Page 29
Pinout TQMa335xL (continued)
TQMa335xL pad description (continued)
TQMa335xL ball
Signal
Pad name
I/O
AM335x ball
J1
DCAN1_TX
UART0_CTS#
I/O
E18
J14
SPI0_D1
SPI0_D1
I/O
B16
J15
MDIO
MDIO
I/O
M17
J16
USB0_DRVBUS
USB0_DRVBUS
IO
F16
J17
USB0_VBUS
USB0_VBUS
A
P15
J2
UART3_TXD
ECAP0_IN_PWM0_OUT
I/O
C18
J3
DDR_DQS1#
Test-Pin do not connect on Mainboard
–
–
J4
DGND
–
P
–
K1
DCAN1_RX
UART0_RTS#
I/O
E17
K14
DGND
–
P
–
K15
RGMII1_TCLK
MMI1_TX_CLK
I/O
K18
K16
RGMII1_TD3
MMI1_TXD3
I/O
J18
K17
RGMII1_TD2
MMI1_TXD2
I/O
K15
K2
UART3_RXD
SPI0_CS1
I/O
C15
K3
DDR_DQS1
Test-Pin do not connect on Mainboard
–
–
K4
DDR_DQ15
Test-Pin do not connect on Mainboard
–
–
L1
UART0_TXD
UART0_TXD
I/O
E16
L15
RGMII1_TCTL
MMI1_TX_EN
I/O
J16
L16
RGMII1_TD1
MMI1_TXD1
I/O
K16
L17
RGMII1_TD0
MMI1_TXD0
I/O
K17
L2
MMC1_DAT0
GPMC_AD0
I/O
U7
L3
MMC1_DAT1
GPMC_AD1
I/O
V7
L4
MMC1_DAT2
GPMC_AD2
I/O
R8
M1
UART0_RXD
UART0_RXD
I/O
E15
M14
SPI1_D1
MII1_RX_ER
I/O
J15
M15
RGMII1_RCLK
MMI1_RX_CLK
I/O
L18
M16
RGMII1_RD3
MMI1_RXD3
I/O
L17
M17
RGMII1_RD2
MMI1_RXD2
I/O
L16
M2
MMC1_DAT3
GPMC_AD3
I/O
T8
M3
MMC1_DAT4
GPMC_AD4
I/O
U8
M4
MMC1_DAT5
GPMC_AD5
I/O
V8
N1
DGND
–
P
–
N14
SPI1_D0
MII1_CRS
I/O
H17
N15
SPI1_CS0
RMII1_REF_CLK
I/O
H18
N16
RGMII1_RD1
MMI1_RXD1
I/O
L15
N17
RGMII1_RD0
MMI1_RXD0
I/O
M16
N2
MMC1_DAT6
GPMC_AD6
I/O
R9
N3
MMC1_DAT7
GPMC_AD7
I/O
T9
N4
DGND
–
P
–
N5
DGND
–
P
–
N7
DGND
–
P
–
P1
GPIO1_28
GPMC_BE#1
I/O
U18
P10
LCD_DATA19
GPMC_AD12
I/O
T12
P11
LCD_DATA23
GPMC_AD8
I/O
U10
P12
DGND
–
P
–
P13
RGMII2_RCLK
GPMC_A7
I/O
T15
P14
SPI1_SCLK
MII1_COL
I/O
H16
P15
UART4_RXD
GPMC_WAIT0
I/O
T17
P16
DGND
–
P
–
P17
USB1_DM
USB1_DM
A
R18
P2
DGND
–
P
–
P3
MMC1_CLK
GPMC_CS#1
I/O
U9