![TQ-Systems MBLX2160A Скачать руководство пользователя страница 14](http://html1.mh-extra.com/html/tq-systems/mblx2160a/mblx2160a_user-manual_1146554014.webp)
User's Manual l MBLX2160A UM 0101 l © 2022, TQ-Systems GmbH
Page 8
TQMLX2160A pinout (continued)
Table 4:
Connector X2, MBLX2160A
Dir.
Level
Group
Signal
Pin
Signal
Group
Level
Dir.
–
0 V
Ground
DGND
A1
B1
DGND
Ground
0 V
–
O
3.3 V
Reset
LX_CPU_RESET_OUT#
A2
B2
TQMLX_RST_IN#
Reset
3.3 V
I
O
3.3 V
Reset
RESET_REQ_OUT
A3
B3
SYSC_MON_UART_RX
SYSC
3.3 V
I
O
3.3 V
Reset
HRESET_OUT#
A4
B4
SYSC_MON_UART_TX
SYSC
3.3 V
O
–
0 V
Ground
DGND
A5
B5
DGND
Ground
0 V
–
I/O
1.8 V
I2C
I2C1_CPU_SCL
A6
B6
SYSC_UART_MUX_RX
SYSC
3.3 V
I
I/O
1.8 V
I2C
I2C2_CPU_SDA
A7
B7
SYSC_UART_MUX_TX
SYSC
3.3 V
O
–
0 V
Ground
DGND
A8
B8
DGND
Ground
0 V
–
I
3.3 V
JTAG_CPLD
JTAG_CPLD_TCK
A9
B9
I2C5_CPU_SCL
I2C
1.8 V
I/O
I
3.3 V
JTAG_CPLD
JTAG_CPLD_TMS
A10
B10
I2C5_CPU_SDA
I2C
1.8 V
I/O
–
0 V
Ground
DGND
A11
B11
DGND
Ground
0 V
–
O
3.3 V
JTAG_CPLD
JTAG_CPLD_TDO
A12
B12
UART1_SOUT
UART
1.8 V
I/O
I
3.3 V
JTAG_CPLD
JTAG_CPLD_TDI
A13
B13
UART1_SIN
UART
1.8 V
I/O
–
0 V
Ground
DGND
A14
B14
UART2_SOUT
UART
1.8 V
I/O
I
3.3 V
SYSC
SYSC_SWCLK
A15
B15
UART2_SIN
UART
1.8 V
I/O
I/O
3.3 V
SYSC
SYSC_SWDIO
A16
B16
UART3_SOUT
UART
1.8 V
I/O
–
0 V
Ground
DGND
A17
B17
UART3_SIN
UART
1.8 V
I/O
–
0 V
Ground
DGND
A18
B18
UART4_SOUT
UART
1.8 V
I/O
I/O
1.8 V
SDHC1
SDHC1_CD#
A19
B19
UART4_SIN
UART
1.8 V
I/O
I/O
1.8 V
SDHC1
SDHC1_WP
A20
B20
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A21
B21
DGND
Ground
0 V
–
I/O
EVDD
SDHC1
SDHC1_CLK
A22
B22
SDHC1_DATA0
SDHC1
EVDD
I/O
–
0 V
Ground
DGND
A23
B23
SDHC1_DATA1
SDHC1
EVDD
I/O
I/O
1.8 V
SDHC1
SDHC1_DS
A24
B24
SDHC1_DATA2
SDHC1
EVDD
I/O
–
0 V
Ground
DGND
A25
B25
SDHC1_DATA3
SDHC1
EVDD
I/O
I/O
EVDD
SDHC1
SDHC1_CMD
A26
B26
SDHC1_DATA4
SDHC1
1.8 V
I/O
–
0 V
Ground
DGND
A27
B27
SDHC1_DATA5
SDHC1
1.8 V
I/O
I
3.3 V
CONFIG
eMMC_SEL0
A28
B28
SDHC1_DATA6
SDHC1
1.8 V
I/O
I
3.3 V
CONFIG
eMMC_SEL1
A29
B29
SDHC1_DATA7
SDHC1
1.8 V
I/O
–
0 V
Ground
DGND
A30
B30
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A31
B31
DGND
Ground
0 V
–
I
3.3 V
CONFIG
BOOT_SRC0
A32
B32
DGND
Ground
0 V
–
I
3.3 V
CONFIG
BOOT_SRC1
A33
B33
DGND
Ground
0 V
–
I
3.3 V
CONFIG
BOOT_SRC2
A34
B34
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A35
B35
TA_BB_TMP_DETECT#
TRUST
TA_BB_VDD
I
I
3.3 V
CONFIG
NOR_SWAP#
A36
B36
TA_TMP_DETECT#
TRUST
1.8 V
I
–
0 V
Ground
DGND
A37
B37
TQMLX_WAKE
CONFIG
3.3 V
I
I
1.8 V
CONFIG
EVDD_SEL
A38
B38
TQMLX_SLEEP#
CONFIG
3.3 V
I
O
3.3 V
SYSC
SYSC_I2C2_SCL
A39
B39
EXT_POWER_FAIL_IN#
CONFIG
3.3 V
I
I/O
3.3 V
SYSC
SYSC_I2C2_SDA
A40
B40
TQMLX_PGOOD
CONFIG
3.3 V
O
–
0 V
Ground
DGND
A41
B41
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A42
B42
DGND
Ground
0 V
–
O
–
USB1
USB1_TX_P
A43
B43
DGND
Ground
0 V
–
O
–
USB1
USB1_TX_N
A44
B44
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A45
B45
USB1_ID
USB1
3.3 V
I/O
I
–
USB1
USB1_RX_P
A46
B46
DGND
Ground
0 V
–
I
–
USB1
USB1_RX_N
A47
B47
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A48
B48
USB1_PWRFAULT
USB1
1.8 V
I/O
I/O
–
USB1
USB1_DP
A49
B49
USB1_DRVBUS
USB1
1.8 V
I/O
I/O
–
USB1
USB1_DN
A50
B50
USB1_VBUS
USB1
5 V
I
–
0 V
Ground
DGND
A51
B51
DGND
Ground
0 V
–
O
–
USB2
USB2_TX_P
A52
B52
DGND
Ground
0 V
–
O
–
USB2
USB2_TX_N
A53
B53
DGND
Ground
0 V
–
–
0 V
Ground
DGND
A54
B54
USB2_ID
USB2
3.3 V
IO
I
–
USB2
USB2_RX_P
A55
B55
DGND
Ground
0 V
–