TMC MI5VP4, Руководство пользователя

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Chapter 6 BIOS Configuration
MI5VP4 User’s Manual 45
Cache Timing
This field sets the timing of the cache in the system. The options are Fast
and Fastest . By default, this field is set to Fast .
Video BIOS Cacheable
When enabled, access to video BIOS addressed at C0000H to C7FFFH
are cached, provided that the cache controller is enabled.
System BIOS Cacheable
When enabled, access to the system BIOS ROM addressed at
F0000H-FFFFFH are cached, provided that the cache controller is
enabled.
Memory Hole
In order to improve performance, certain space in memory can be
reserved for ISA cards. This field allows you to reserve 15MB to 16MB
memory address space to ISA expansion cards. This makes memory from
15MB and up unavailable to the system. Expansion cards can only access
memory up to 16MB. By default, this field is set to
Disabled.
Init AGP Display First
This field allows the system to initialize first the AGP VGA display on
the motherboard when system is turned on.
Frame Buffer Size
The frame buffer memory size has a default setting of 4M . The other
option is 8M .
AGP Aperture Size
The field sets aperture size of the graphics. The aperture is a portion of
the PCI memory address range dedicated for graphics memory address
space. Host cycles that hit the aperture range are forwarded to the AGP
without any translation. The options available are
4M, 8M, 16M, 32M,
64M, 128M and 256M . The default setting is 64M .
DRAM Clock Select
This field sets the memory bus frequency of the memory. By default, the
field is set to
Auto . The other setting is 100MHz .
Auto Detect DIMM/PCI Clk
When enabled, the system automatically shuts off clocks of unused
DIMM/PCI slots. The default setting is
Disabled . This field is for CE
testing use only.