THOMSON DTH7500E, Руководство по обслуживанию

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DTH7500 / DTH8000
First issue 12 / 03
(PREP)
CX002
100NF
DGND DGND
DGND
CIRCUIT DIAGRAM
21285810-00-3
+5VS5A
DGND DGND
SLIDE_OUT
DGND
SLIDE_OC
(PREP) (PREP)
48CK_USB
DGND DGND
SYSCLK
DGND
+12VS
DGND
27CK_CLA
(PREP)
DGND
ACLK_27M
DGND
+3.3VPLL
DGND
27CK_PLL
14
CLK5
10
OE
9
LCLK3
1
XIN
7
LCLK1
8
LCLK2
3
AVDD
11
VDDL
16
XOUT
12
LCLK4
13
VSS
15
CLK6
2
VDD
6
VSSL
4
PWRDWN
5
AVSS
5
4
6
2 1 5
13
12
16
11
3
8
7
1
9
10
14
CY22050FCID9A
IC004
+12VS
(PREP)
DGND
TC003
BF799W
DGND
27CK_TEST
DGND
DGND
DGND
24P0
CC008
(PREP)
(PREP)
(PREP)
*
(PREP) (PREP)
27CK_PLL
DGND
+8VS
3.3ISORT
AGND
+8VS
PWR_OK
3.3ISORT
+5VS3D
DGND
+5VS5A
AGND
+3V3SD
3.3ISO
+2V5SD
+3VS2A
+1V8SD
DGND
SLIDE_IN
3.3ISO
PWR_OK
SLIDE_OUT
SLIDE_IN
SLIDE_OC
TPV27
TPV10
TPV16
TPV17
2 BB401D
4 BB401D
5 BB401D
6 BB401D
7 BB401D
8
BB401D
9 BB401D
10
BB401D
11 BB401D
12
BB401D
14 BB401D
15
BB401D
16 BB401D
17
BB401D
18 BB401D
19
BB401D
20 BB401D
21 BB401D
22 BB401D
23 BB401D
24 BB401D
25 BB401D
TPV21
TPV24
TPV18
TPV25
13 BB401D
TPV20
TPV19
TPV22
DGND
DGND DGND
+3.3VPLL
(PREP)
CLA_STCLK
ADMCLK
48CK_USB
168CK_ELM
(TO GS)
DGND
DGND
(PREP)
DGND
DGND
+3V3SD
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
+3.3VPLL
168CK_ELM
+3.3VPLL
DGND
DGND
+3.3VPLL
CC001
16.0V
100N0
RC007
1M0
100N0
16.0V
CC009
CC011
18P0
18P0
CC013
18P0
CC016
100N0
16.0V
CC017
100N0
16.0V
CC021
LC002
CC023
18P0
1K0
RC022
CC024
4P0
LC003
120N0H
2P2
CC025
1P0
CC026
LC004
120N0H
CC027
2P2
1
EC002
1
3
5
9
11
13 12
10
8
6
4
2
14
7
IC001
15406700
FC001
(PREP)
(PREP)
CC010
18P0
CC032
18P0
(PREP)
DGND
27CK_GS
47R0
RC030
DXX_VCLK
1
3
5
9
11
13 12
10
8
6
4
2
14
7
15406700
IC002
(PREP)
47R0
RC021
RC027
47R0
CLA_STCLK
CC031
100N0
RC014
47R0
CLA_SCLK
27CK_DXX
27CK_GS
CC018
18P0
27CK_DGV
(PREP)
(PREP)
CTRL
1
GND
2
4
VCC
OUT 3
3
4
2
1
21153950
27MHZ
QC003
CC030
47U0
27MHZ
XC001
27MHZ
XC003
RC008
200R0
27CK_ACLK_SYS
CC019
18P0
ACLK_27M
DVA_VPLL
RC009
ORO
ORO
RC010
(PREP)
CC002
18P0
DGND
DGND
TPV12
TPV14
TPV09
TPV26
TPV29
TPV30
3 BB401D
27CK_DXX
DGND
AGND
1
BB401D
26
BB401D
TPV13
+3.3VPLL
TPC14
DGND
TPC09 TPC10
TPC11 TPC12
+5VS3D
DGND
DGND
DGND
TPV15
27CK_ACLK_SYS
TPC15
RC037
0R0
CC007
24P0
CC034
100N0
RC001
47R0
TPC13
TPC01 TPC02
ADMCLK
0R0
RC018
RC012
68R0
TPC03 TPC04
68R0
RC013
DVA_VPLL
TPC05 TPC06
TPC07 TPC08
0R0
RC032
0R0
RC005
RC033
47R0
DGND
RC025
4R7
+3.3VPLL
180R0
RC042
RC043
0R0
10K0
RC041
CC028
4P0
TC002
BF799W
56K0
RC048
RC047
180R0
RC011
47R0
+3.3VPLL
RC044
0R0
100N0
CC035
DGND
18P0
CC036
168CK_ELM
RC040
22R0
DGND
14
CLK5
10
OE
9
LCLK3
1
XIN
7
LCLK1
8
LCLK2
3
AVDD
11
VDDL
16
XOUT
12
LCLK4
13
VSS
15
CLK6
2
VDD
6
VSSL
4
PWRDWN
5
AVSS
5
4
6
2 1 5
13
12
16
11
3
8
7
1
9
10
14
CY22050FC1D31
IC006
21274950
39K0
RC049
39R0
RC045
39R0
RC046
(PREP)
(PREP)
47R0
RC017
CLA_SCLK
0R0
RC031
TPV23
TPV11
RC026
47R0
(PREP)
DGND
18P
CC038
RC051
18R0
CC037
18P
CLOCK CIRCUITS
+3V3SD
CX001
100NF
DX851
ES1A
+2V5SD
TPV28
+1V8SD
4N7
CX003
4N7
CX004 CX005
4N7
0R0
RX001
(PREP)
IN
GND
OUT
IX001
LD1117DT18C
140103
DIGITAL
IDR03
(DIGITAL BOARD 9/9)
MAIN SCHEMATIC DIAGRAM - SCHEMA DE LA PLATINE PRINCIPALE - SCHALTBILD HAUPTPLATINE - SCHEMA DELLA PIASTRA PRINCIPALE- ESQUEMA DE LA PLATINA PRINCIPAL