Thales Cinterion LGA DevKit L, Руководство пользователя

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Cinterion
®
LGA DevKit User Guide
9.2 LGA DevKit L
35
t
lga_devkit_ug_v03 2020-05-29
Public / Released
Page 31 of 36
9.2.2 Schematics
0475532001
GND GND
GN
D
GN
D
10
p
F
_np
22
0n
F
10
p
F
_np
1n
F
GN
D
U.FL-R-SMT(01)
GND
2x4_HEAD_SMD
0R
0R
18pF 18pF
22
n
H
18pF 18pF
22
n
H
18pF 18pF
22
n
H
KSC
7
0
1
J
L
F
S
KSC
7
0
1
J
L
F
S
GND
1u 1u
0R
100k
GND
2k
7
0R
200R
_n
p
47
u
F
47
u
F
47
u
F
47
u
F
GND
2x6_HEAD_SMD
ATMEGA88PA-MMH
A
T
ME
G
A
8
8
P
A
-MMH
A
T
ME
G
A
8
8
P
A
-MMH
GND
47
k
47
k
_np
_np
0R
47k_np
_np
_np
_np
_np
_np
_np
LP2985AIM5-3.0
GND
10
0n
F
10
n
F
GND
10
0n
F
GND
10
0n
F
GND
22
0
R
V
L
M
G
13
00-
G
S
08
47
k
CD
B
Q
R
7
0
GND
73251-1150
73251-1150
_np _np _np
_np
NX3008NBKS
GN
D
Z
X
62
D
-B-
5
P
A
8
(3
0)
GN
D
GND
0R
GN
D
_np
GND
_n
p
GND
LGA DevKit L
CON8
CCIO
CCGND
CCRST
CCVCC
CCCLK
CCDET1
CCDET2
C1
0
C1
1
C1
2
C1
3
CON1
JP8
1 2
3 4
5 6
7 8
R46
R31
C40 C41
L3
C42 C43
L1
C44 C45
L2
BT
N
1
BT
N
2
1
1
2
2
3
3
4
4
5
5
6
6
CON6
_np
C5
5
C5
6
R5
R62
R4
R28
R58
LE
D
7
C3
5
C3
6
C3
7
C3
8
JP4
1 2
3 4
5 6
7 8
9 10
11 12
IC9A
/RST_PCIN14_C6
25
XTAL1_TOSC1_PCIN6_B6
5
XTAL2_TOSC2_PCIN7_B7
6
SCK_PCIN5_B5
15
AREF
17
INT0_PCIN18_D2
28
TXD_PCIN17_D1
27
RXD_PCIN16_D0
26
MOSI_PCIN3_B3
13
MISO_PCIN4_B4
14
ADC0_PCIN8_C0
19
ADC1_PCIN9_C1
20
ADC2_PCIN10_C2
21
ADC3_PCIN11_C3
22
ADC4_SDA_PCIN12_C4
23
ADC5_SCL_PCIN13_C5
24
INT1_OC2B_PCIN19_D3
1
AIN1_PCI23_D7
9
AIN0_OC0A_PCI22_D6
8
T1_OC0B_PCI21_D5
7
ICP1_CLKO_PCIN0_B0
10
OC1A_PCIN1_B1
11
SS_OC1B_PCIN2_B2
12
XCK_T0_PCI20_D4
2
GND
VCC
43
IC9B
GND
VCC
18
1
6
IC9C
R8
7
R8
8
TP57
TP61
R97
R98
TP66
TP75
TP77
TP78
TP79
TP80
VOUT
5
VIN
1
EN
3
GND
2
BP
4
IC11
C7
5
C7
6
C7
7
C7
8
R9
9
LE
D
9
R
101
D5
CON2
GND
GND
CON3
GND
GND
TP4 TP5 TP6
TP10
T17A
5
3
4
GPIO4/WAKE/FST_SHDN
GPIO9/DNU
GPIO7/DNU
VUSB1
CCCLK1
CCVCC
CCIO1
CCRST1
CCIN1
GND1
RXD0
TXD0
VDDLP1
BATT+_W CDMA
BATT+_W CDMA
IGT
RING0
DSR0
RTS0
DTR0
CTS0
DCD0
EMG_RST1
POW ER_IND
GND/AGND/DNU
MICN1/DNU
MICP1/DNU
EPN1/DNU
EPP1/DNU
VMIC/DNU
USB_DN
USB_DP
GPIO10/DNU
ADC2/DNU/NC
ADC3/DNU
GPIO5/DNU
GPIO8/DNU/NC
ADC1/DNU
I2S_DOUT/SPI_MISO/DNU
MCLK/I2S_MCLKOUT/SPI_MOSI
I2S_W SOUT/SPI_CLK/DNU
I2S_SCLKOUT/SPI_CS/DNU
GPIO6/LC_IND
BATT+_RF/BATT+_GSM
VEXT/V180
BATT+
BATT+
CCCLK2/GND/NC
CCVCC2/DNU/NC
CCIO2/GND/NC
CCRST2/GND/NC
BATT+_RF/BATT+_GSM
ANT_DRX_MIMO/ANT_DRX/DNU/NC
ANT_MAIN/ANT_W GSM
DNU
ANT_GNSS
DIN/I2S_DIN
BCLK/I2S_SCLKIN
FSC/I2S_W SIN
DOUT
GPIO3/DNU/NC
GPIO2/DNU/NC
GPIO1/GPS_1PPS/DNU
STATUS
ANT_GNSS_DC
VGNSS
CCIN2/GND/NC
I2CDAT/DNU
I2CCLK/DNU
DNU1
DNU2
DNU3
DNU4
DNU5
DNU6
DNU7
DNU8
DNU9
DNU10
DNU11
DNU12
DNU13
DNU14
DNU15
DNU16
DNU17
DNU18
DNU19
GND2/TW IST_DETECT
GND3/INDUSTRIAL_DETECT1
GND4/INDUSTRIAL_DETECT2
GND3/TW IST_DETECT2
LGA_MODULE
GPIO4/WAKE/FST_SHDN
GPIO9/DNU
GPIO7/DNU
VUSB1
CCCLK1
CCVCC
CCIO1
CCRST1
CCIN1
RXD0
TXD0
VDDLP1
BATT+_W CDMA
BATT+_W CDMA
IGT
RING0
DSR0
RTS0
DTR0
CTS0
DCD0
EMG_RST1
POW ER_IND
GND/AGND/DNU
MICN1/DNU
MICP1/DNU
EPN1/DNU
EPP1/DNU
VMIC/DNU
GPIO10/DNU
ADC2/DNU/NC
ADC3/DNU
GPIO5/DNU
GPIO8/DNU/NC
ADC1/DNU
I2S_DOUT/SPI_MISO/DNU
MCLK/I2S_MCLKOUT/SPI_MOSI
I2S_W SOUT/SPI_CLK/DNU
I2S_SCLKOUT/SPI_CS/DNU
GPIO6/LC_IND
BATT+_RF/BATT+_GSM
VEXT/V180
BATT+
BATT+
CCCLK2/GND/NC
CCVCC2/DNU/NC
CCIO2/GND/NC
CCRST2/GND/NC
BATT+_RF/BATT+_GSM
DNU
DIN/I2S_DIN
BCLK/I2S_SCLKIN
FSC/I2S_W SIN
DOUT
GPIO3/DNU/NC
GPIO2/DNU/NC
GPIO1/GPS_1PPS/DNU
STATUS
VGNSS
CCIN2/GND/NC
I2CDAT/DNU
I2CCLK/DNU
DNU1
DNU2
DNU3
DNU4
DNU5
DNU6
DNU7
DNU8
DNU9
DNU10
DNU11
DNU12
DNU13
DNU14
DNU15
DNU16
DNU17
DNU18
DNU19
PATCHFIELD_BOTTOM
P$1
P$2
P$3
P$4
P$5
P$
10
P
$6*
2
P$
8*
2
P$
1
1
CO
N
1
7
TP58
R3
JP1
1
2
3
4
LE
D
8
GND/[2]
GND/[2]
GND/[2]
GND/[2]
ANT_GPS
ANT_GPS
AGND/[3] AGND/[3]
VMIC/[3] VMIC/[3]
MICN1/[3] MICN1/[3]
EPP1/[3] EPP1/[3]
EPN1/[3] EPN1/[3]
MICP1/[3] MICP1/[3]
I2CCLK/[2] I2CCLK/[2]
I2CDAT/[2] I2CDAT/[2]
ADC1/[3] ADC1/[3]
FSDAI/[3] FSDAI/[3]
RXDAI/[3] RXDAI/[3]
TXDAI/[3] TXDAI/[3]
GPIO8/[3] GPIO8/[3]
GPIO7/[3] GPIO7/[3]
GPIO6/[3] GPIO6/[3]
GPIO5/[3] GPIO5/[3]
GPIO4/[3] GPIO4/[3]
RXD1/[3]
RXD1/[3]
RXD1/[3]
TXD1/[3]
TXD1/[3]
TXD1/[3]
CTS1/[3] CTS1/[3]
RTS1/[3]
RTS1/[3]
RTS1/[3]
RXD0/[3] RXD0/[3]
TXD0/[3] TXD0/[3]
CTS0/[3] CTS0/[3]
RTS0/[3] RTS0/[3]
DCD0/[3] DCD0/[3]
DTR0/[3] DTR0/[3]
DSR0/[3] DSR0/[3]
RING0/[3] RING0/[3]
VEXT_MODULE/[3]
VEXT_MODULE/[3]
VEXT_MODULE/[3]
CCIN/[3] CCIN/[3]
SCLKDAI/[3] SCLKDAI/[3]
ANT_GPS_PWR/[2]
ANT_DRX
ANT_DRX
ANT_MAIN
ANT_MAIN
VSIM
VSIM
VSIM
CCRST
CCRST
CCRST
CCCLK
CCCLK
CCCLK
CCIO
CCIO
CCIO
E
M
E
R
G_
R
S
T
_
X
1
0
0
/[3
]
ON
_
B
U
T
T
O
N
ON_BUTTON
BATT+_BB/[2]
BATT+_BB/[2] BATT+_BB/[2]
BATT+_RF/[2]
BATT+_RF/[2]
BATT+_RF/[2] BATT+_RF/[2]
EMG_RST/[3] EMG_RST/[3]
VDDLP
VDDLP
VDDLP
VDDLP
CCIN_X100/[3]
DNU8 DNU8
DNU9 DNU9
DNU12 DNU12
DNU13 DNU13
DNU14 DNU14
DNU15 DNU15
DNU16 DNU16
DNU17 DNU17
DNU18 DNU18
DNU19 DNU19
V480/[2]
V480/[2]
RESET@UC
RESET@UC
TWIST_DETECT
TWIST_DETECT
/[2]
VUSB_MODULE
VUSB_MODULE
VUSB_MODULE VUSB/[2]
VUSB/[2]
CCIN2/[3] CCIN2/[3]
CCCLK2/[3] CCCLK2/[3]
CCIO2/[3] CCIO2/[3]
CCVCC2/[3] CCVCC2/[3]
CCRST2/[3] CCRST2/[3]
EXTERN_REFERENCE/[2]
INDUSTRIAL_DETECT1
INDUSTRIAL_DETECT1
INDUSTRIAL_DETECT2
INDUSTRIAL_DETECT2
MOD_ON_DET/[3]
SIMPU_E_OD
+3V/[3]
+3V/[3]
+3V/[3]
+
3
V
/[3
]
+3V/[3]
E_VEXT-PD/[2]
DI
S
CHA
RG
E
_
B
A
TT
+
/[
2
]
IGT_X100/[3]
LED_EN/[2]
ATMEGA_3V_LDO/[2]
LDO_OUT/[2]
BATT+_WCDMA
BATT+_WCDMA
DNU DNU
DNU1 DNU1
DNU2 DNU2
DNU3 DNU3
DNU4 DNU4
DNU6 DNU6
DNU7 DNU7
GPIO1
GPIO1
GPIO1
GPIO2
GPIO2
GPIO2
GPIO3
GPIO3
GPIO3
GPIO9
GPIO9
GPIO9
GPIO10
GPIO10
GPIO10
ADC2
ADC2
ADC2
ADC3
ADC3
ADC3
VGNSS VGNSS
VGNSS
STATUS/[2] STATUS/[2]
PWR_IND PWR_IND
IGT/[3]
IGT_MODULE/[3] IGT_MODULE/[3]
BOARD.D+
BOARD.D+
BOARD.D-
BOARD.D-
PWR_IND_X100/[3]
PWR_IND_X100/[3]
SIM_SWITCH SIM_SWITCH
SIM_SWITCH
SIM_SWITCH
ANT_SWITCH ANT_SWITCH
ANT_SWITCH
TX_ACT TX_ACT
TX_ACT
TWIST_DETECT2
TWIST_DETECT2
Änderung Datum Nam.
Datum Name
Bear.
Gepr.
Vers.: Blatt:
Ers. f.: Ers. d.:
BG:
A B C D E F G H
H G F E D C B A
5
2
1
1
2
3
4
5
4
3
AS
C
0
GP
IO
AUDI
O
PO
W
E
R
SI
M
U
SB
CO
NTR
O
L
I2
S
SI
M
2
RF
PLS8/PHS8/AGS2/PDS8 Dual Design
PCM
ADC
I2
C
AS
C
0
GP
IO
AUDI
O
PO
W
E
R
SI
M
U
SB
CO
NTR
O
L
I2
S
SI
M
2
RF
PLS8/PHS8/AGS2/PDS8 Dual Design
PCM
ADC
I2
C
VCC
D-
D+
ID
GND
01.04.2019 DO
B1 1
BB
BB
ONLY PDS5/PDS6/PDS8
ONLY PLS8
TXD1/IO17
RXD1/IO16
RTS1/IO18
CTS1/IO19
PCM_OUT
PCM_FSC
PCM_CLK
PCM_IN
SPI_CLK
SPI_MISO
SPI_MOSI
ONLY PLS8
ONLY PLS8
STATUS
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO25
PLS62
PLS8: NOT SUPPORTED
BB
BB
ONLY PDS5/PDS6/PDS8
ONLY PLS8
TXD1/IO17
RXD1/IO16
RTS1/IO18
CTS1/IO19
PCM_OUT
PCM_FSC
PCM_CLK
PCM_IN
ONLY PLS8
ONLY PLS8
STATUS
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO25
PLS62
SMA + U.FL CONNECTORS
M
IC
R
O
C
ON
T
R
OLL
E
R
+
ON
C
IRC
UI
T
+
R
S
T
FREE GPIO/PINS PINHEADER
SIM HOLDER
N5
P4
P5
K15
L14
L15
K14
M14
L6
E13
D14
E12
M15
N14
M4
M5
L16
M13
M12
A4
B3
N13
P13
N3
N4
A12
E1
K1
H15
H16
G14
G15
G16
F16
C14
D15
D16
E15
E16
C15
N6
N7
P6
P7
P12
P11
N10
N8
P8
P9
N9
P10
M11
H14
M7
M8
M9
M10
J14
J15
J16
L16
B14
K1
D5
K16
D12
F14
F15
69x
A7
C12
C13
D13
E14
F13
G4
G13
H13
K12
K13
L5
L7
L8
L9
L10
L11
L12
L13
N12
A9
E5
J4
A5
N5
K15
L14
L15
K14
M14
L6
E13
D14
E12
M15
N14
M4
M5
L16
M13
M12
A4
B3
N13
P13
N3
N4
H15
H16
G14
G15
G16
F16
C14
D15
D16
E15
E16
C15
N6
N7
P6
P7
P12
P11
N10
N8
P8
P9
N9
P10
M11
H14
M7
M8
M9
M10
J14
J15
J16
L16
B14
K16
D12
F14
F15
A7
C12
C13
D13
E14
F13
G4
G13
H13
K12
K13
L5
L7
L8
L9
L10
L11
L12
L13
N12