Texas Instruments UCC20520EVM286, Руководство пользователя

Страница: 11 / 18

www.ti.com
Test Waveforms (C
L
=0pF) With Different DT Configurations
11 SLUUBG8B – June 2016 – Revised November 2018
Submit Documentation Feedback
Copyright © 2016–2018, Texas Instruments Incorporated
Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286,
and UCC21530EVM-286
7 Test Waveforms (C
L
=0pF) With Different DT Configurations
7.1 DT Connected to VCCI(J-DT Option B in Table 2 )
The dead time (DT) between the outputs of the two channels is decided by inputs (see Figure 4 ). Overlap
between two output channels is allowed. Figure 4 shows a waveform with overlapped operations.
Figure 4. Overlap is Allowed When DT Connected to VCCI
(Channels 3 and 4 are PWM Inputs, Channels 1 and 2 are Driver Outputs)
7.2 DT Pin Floating or Left Open (J-DT Option A in Table 2 )
The dead time (DT) between the outputs of the two channels is around 8 ns, which is preset for interlock
protections (see
Figure 5 ).
Figure 5. Test Waveforms if DT is Left Open
(Channel 3 and 4 are PWM Inputs, and Channel 1 and 2 are Driver Outputs)