TUSB320-LA-EVM and TUSB320-HA-EVM Features
3
SLLU235A – January 2016 – Revised November 2018
Copyright © 2016–2018, Texas Instruments Incorporated
TUSB320-LA-EVM and TUSB320-HA-EVM
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TUSB320-LA-EVM and TUSB320-HA-EVM Features
The EVM can be configured for the evaluation of DFP, UFP, or DRP Type-C implementation. The EVM
can also be configured to operate in I
2
C or GPIO mode. Default configuration is I
2
C.
This section describes EVM features enabling users to evaluate Type-C implementations in different
modes of operation.
2.1
Power
The EVM can be powered by USB VBUS or 5-V to 5.5-V DC IN through a power jack J5 (2-mm positive
tip, 6.5-mm negative outer shield). The VBUS can be provided via a legacy connection or Type-C
connection. When the EVM operates in DFP mode, the VBUS is provided through micro-AB connector J6,
if the board is connected to a USB host or VBUS source. When the EVM operates in UFP mode, the
VBUS is provided through Type-C connector J1, if the board is connected to a USB host or VBUS source
through a Type-C cable. The 5-V DC IN (J5) can also be used to supply power if a stand-alone operation
is desired without connecting to a USB VBUS power source. Due to diode/IR drop in the test setup, the
VBUS on the connector may be below the desired level. The board is designed to take up to 5.5 V
through DC_5V IN or TP5 (PWRIN) header for test purposes.
If D9 is installed on the board,
do not connect
the EVM to a USB Host system through the micro AB
USB2 connector(J6) at the same time 5 V is supplied through 5 V DC IN J5 or Type-C Connector J7.
Test loops and headers to power rails and GND are provided for test purposes. Some power rails can be
isolated from the main power supply by removing ferrite beads or passive components. Refer to the
schematics for power rail connection details. Do not supply external power through the test headers/loops
unless the power rail has been isolated from other power sources. In normal operation, power must be
provided through the USB connectors or DC power barrel only: J7, J6, or J5.
2.2
VBUS
2.2.1
VBUSOff time
To meet the VBUSOff time of 650 ms, remove the 10-µF capacitor C1. Current limiting can be reduced to
3 A–3.5 A by changing the R30 value to 47 k
Ω
.
2.2.2
VBUS Min Level
VBUS, provided on J1 or J6 may be lower than 4.75 V. For bus-powered devices to be attached to the
EVM for test purposes, TI recommends using a 5.5-V external power supply through J5 or TP5.
