1 Introduction
This guide describes the default NVM settings of the TPS6593-Q1 programmable device. These default settings
are intended to support a wide variety of systems, with various interface options and power requirements. This
user's guide does not provide information about the electrical characteristics, external components, package, or
the functionality of the PMIC. For such information and the full register maps, refer to the datasheet for each
device. The data sheet specification will be the definitive source in the event of any inconsistency between the
official specification and any user's guide, application report, or other referenced material.
2 Device Versions
The unique NVM settings for each PMIC are distinguishable by the orderable part number for the device. The
NVM settings can also be distinguished using the TI_NVM_ID, and TI_NVM_REV values listed in
Table 2-1. TPS6593-Q1 NVM Settings and Orderable Part Numbers
PDN USE CASE
Orderable Part Number
Device
Mode
TI_NVM_ID
TI_NVM_REV
Default I2C
Address
•
Supports I2C or SPI interface
•
Supports EEPROM programming
of desired default settings and
sequencing
•
Power resources are disabled at
power up to allow for user to
program the device on application
board
•
•
Default settings of the
TPS6593EVM
PTPS65930400RWERQ1
Master
0x00
0x4
0x28
(1)
Can be programmed to a different phase configuration.
(2)
Can be reprogrammed to slave-mode for multi-PMIC systems.
These NVM settings are also supported in the
, under the template name
Generic_TPS6593
. For more details on viewing NVM templates in the GUI, see the
.
3 Default Configuration
This section details how the TPS6593-Q1 power resources and GPIO signals are configured by default.
shows that the PMIC can take 3.3 V through 5 V as its input supply range. Additionally, all BUCKs
and LDOs are disabled, with 0 V output by default.
The default phase configuration for this device separates all BUCKs. This phase configuration can be
reprogrammed to support multi-phase options if needed. If the system requires updates to the phase
configuration, it is recommended that the hardware matches the intended phase configuration for the system, not
the default single phase configuration, when programming the device with the custom NVM settings.
The GPIOs are all inputs by default, except GPIO1 and GPIO2. GPIO1 and GPIO2 are configured as CS and
SDO pins in the event that a SPI interface is used. All evaluation capabilities and programming capabilities can
be equally accessed by using I2C or SPI. GPIO3, GPIO4, and GPIO10 are used to update the interface of the
PMIC to match the interface being used to program the PMIC. By default, the PMIC utilizes I2C, with no CRC,
and a default I2C1 address of 0x28. If no updates need to be made to these settings, GPIO3, GPIO4, and
GPIO10 signals are not required during programming.
Introduction
2
Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM
SLVUC24 – MAY 2021
Copyright © 2021 Texas Instruments Incorporated
