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Using the TPS51100

User's Guide

Literature Number: SLUU201

JULY 2004

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Содержание TPS51100

Страница 1: ...Using the TPS51100 User s Guide Literature Number SLUU201 JULY 2004 ...

Страница 2: ...specifications with minimal external components The high speed LDO allows designs with fewer and smaller external capacitors reducing the size and cost of the dual data rate memory power solution With the addition of an external regulator to generate the necessary core and I O voltage for the memory module the TPS51100 provides both the termination voltage and a 10 mA buffered reference voltage ne...

Страница 3: ...0 mV VVTT RIPPLp p Termination voltage ripple 1 0 20 IVTT Termination current VVIN LDO VVDDQ 2 2 A VVtt_ref tol Reference voltage tolerance IVtt_ref 10 mA 10 10 mV IVtt_ref Reference current 10 mA 1 VTT output tracks theripple voltage on VDDQSNS input per DDR specification The TPS51100EVM schematic is shown in Figure 1 Figure 1 TPS51100EVM Schematic A Standard 100 mil spacing header JP1 provides t...

Страница 4: ... for the VTT and VTT_REF voltages In either case VDDQ must be between 1 5 V and 3 4 V to provide the LDO source voltage for the TPS51100 Figure 2 TPS51100EVM Jumper Location and Default Position The TPS51100EVM ships preconfigured to use the VDDQ input voltage as both the LDOIN and VDDQSNS voltage for the TPS51100 In this configuration the outputs VTT andVTTREF is the VDDQ voltage This is the most...

Страница 5: ...W VV5IN should be connected between pins V5IN and V5IN_GND VV5IN supplies the TPS51100 operating current and powers the S3 and S5 sleep state switches VVDDQ IN is a DC voltage source capable of delivering 1 5 VDC to 3 4 VDC at 3 5 ADC with a power handling capability of at least 12 W VVDDQ IN should be connected to between pins VDDQ IN and V5IN GND VVDDQ IN supplies the source current for VLDOIN a...

Страница 6: ...raps boot straps or mats are connected referencing the user to earth ground before power is applied to the EVM Electrostatic smock and safety glasses should also be worn 2 Connect power supplies loads voltage meters and current meters as shown in Figure 1 3 Set 100mil shunt jumper as described in User Configuration Jumper Settings for desired operational configuration Note Do not attempt to change...

Страница 7: ...sembly Drawing and Layout Figure 4 Top Side Component Output Top View Figure 6 Top Copper Layer Top View Figure 5 Top Silk Screen Top View Figure 7 Bottom Copper Layer Bottom View Using the TPS51100 SLUU201 JULY 2004 7 ...

Страница 8: ...r ceramic 0 1 µF 50 V X7R 10 805 TDK C2012X7R1H104K J1 J2 J3 J4 Keystone 8 Header single pin 0 125 1 1573 2 J5 J6 J7 J8 Electronics 1 JP1 Header 3 pin 100 mil spacing 0 1 0 3 Sullins PTC36SAAN 0 R1 Resistor chip 1 10W 1 805 1 R2 Resistor chip 0 Ohms 1 10 W 1 805 Std Std 2 SW1 SW2 Switch ON ON Mini Toggle 0 28 0 18 NKK G12AP IC High Performance DDRI II 3A LDO Buffered 1 U1 HTTSOP 10 TI TPS51100DGQ ...

Страница 9: ...Y SHALL BE Liable to the other FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the EVM User s Guide a...

Страница 10: ...ice and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyer...

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