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EN12Vb
Or
EN9Vb
H
IPW
R
D
VD
D
H1
H2
H3
H4
J8
1
0
0
k
Ÿ
2
2
0
k
Ÿ
1
0
0
k
Ÿ
H
IPW
R
D
VD
D
D
VD
D
PCTRL
PSEL
VAU
X
D
VD
D
PSEL
P1
P2
P3
P4
J7
1
0
0
k
Ÿ
1
0
0
k
Ÿ
2
2
0
k
Ÿ
Configuring the EVM
8
SLVUAP7A – April 2016 – Revised September 2016
Copyright © 2016, Texas Instruments Incorporated
TPS25740EVM-741 and TPS25740AEVM-741 Evaluation Module User
Guide
Table 4. Test Points
J7
J8
Description
TP1
VIN
Input voltage
TP2
DCDC_OUT
Output of the Buck Boost and input to the TPS25740 and TPS25740A circuitry.
TP3/TP4
GND
Input ground test points.
TP15/TP16
GND
Output ground test points.
TP6
SYNC
Capacitive coupled measurement of SYNC pin.
TP7
PGOOD
Power good output of the DC/DC. High = power good
TP5
UFPb
Active low signal which is asserted when a UFP is connected on the other side of the cable.
TP11, TP12
CTL1, CTL2
Control signals coming from the TPSP25740 and TPS25740A that adjust the output voltage of the buck
boost converter based on the following table:
Voltage contained in PDO requested by UFP
CTL2 State
CTL1 State
5 V
High-Z
High-Z
12 V or 9 V
Low
High-Z
20 V or 15 V
Low
Low
TP13
GDNG
NFET gate drive signal
TP9
VBUS
Voltage that is applied to the Vbus of the type C receptacle and cable.
TP10
VPWR
Voltage tied to VPWR, which is used to power the TPS2574x chip.
TP14
DSCG
The TPS25740 and TPS25740A discharge VBUS with this pin.
TP8
EN_DCDC
Tied to the enable pin of the DC DC.
4.2
Setting Advertisement Levels with J7 and J8
The advertised power, voltages, and currents can be configured using J7 and J8 as shown in
and
.
Figure 4. Power Select Header – J7
Figure 5. Voltage and Current Select Header –
J8
4.3
Equipment Setup
The following equipment is required to set up the EVM:
•
Power supply capable of 12 V and preferably 10 A (120 W)
•
Resistive or electronic load
•
PD capable UFP to negotiate voltages, in this case the TPS25720 EVM was used
•
Type C cable