background image

Q2

5V-PU

GND

GND

Orange

D2
OTW_CLIP

5V-PU

GND

GND

MONITORS

100

R33

100

R35

FAULT

GND

GND

GND

GND

GND

GND

GND

GND

GND

PVDD

GND

GND

PVDD

GND

GND

GND

GND

RESET

GND

GND

GVDD

0.1uF

C22

GND

IN1_P

IN1_M

5V-PU

SLAVE MODE
MASTER MODE (600 kHz)
MASTER MODE AM1 (533 kHz)
MASTER MODE AM2 (480 kHz)

GND

FREQUENCY

ADJUST

OUT2_M

IN2_M

IN2_P

1.00k

R29

1.00k

R31

100pF

C64

100

R23

100pF

C58

100

R19

100pF

C30

100

R10

100pF

C19

100

R5

OUT1_P

OUT1_M

OUT1+

OUT1-

OUT2+

OUT2-

1

2

3

4

5

6

7

8

J16

1µF

C56

3.30

R54

GND

GND

GND

GND

1µF

C53

1µF

C51

1µF

C50

TP2

OUT1_P

TP5

OUT1_M

TP9

OUT2_M

TP4

PVDD

TP8

PVDD

TP3

OUT1+

TP10

OUT1-

TP11

OUT2+

TP12

OUT2-

J13

FAULT

0

R30

VDD

GVDD

FAULT

OTW_CLIP

GND

OSCILLATOR

SYNC

INTERFACE

4

1

2

3

J17

1µF

C41

TP26

FREQ_ADJ

TP21

IN1M

TP22

IN2P

TP23

IN2M

TP19

AVDD

TP15

GVDD

TP16

VDD

1000pF
100V

C25

1000pF
100V

C36

1000pF
100V

C44

1000pF
100V

C60

10µH

L6

TP20

IN1P

OUT1+

OUT1-

OUT2-

OUT2+

IN1P

IN1M

IN2P

IN2M

FROM ANALOG

OTW_CLIP

TO

ANALOG

FRONT END

GND

GND

6

4

5

1

3

S1

RESET

GND

0.1uF

C67

GND

0.1uF

C18

4.02k

R26

GND

PVDD

100k

R6

GND

GND

1

GND

2

MR

5

RESET

3

VDD

4

U7

TPS3802K33DCKR

GND

RESET CONTROL

RESET-SW

RESET

RESET-SW

Q1

TO AIB

OTW_CLIP

FAULT

CONTROLLER

RESET-SW

1µF
100V

C32

1µF
100V

C33

1µF
100V

C47

1µF
100V

C48

1µF
100V

C42

1µF
100V

C34

Red

D4
FAULT

0.033µF

C27

0.033µF

C29

OUT2_P

TP7

OUT2_P

0.033µF

C52

0.033µF

C54

TP6

GND

GND

OSCM

OSCP

OSCM

OSCP

FREQ_ADJ

FREQ_ADJ

TP1

OTW_CLIP

TP14

FAULT

5V-PU

J6

HEAD

GND

TP18

HEAD

10.0k

R68

49.9k

R15

30.0k

R17

47.0k

R24

47.0k

R28

HEAD

CMUTE

IN1_P

IN1_M

IN2_P

IN2_M

GAIN/SLV

VDD

AVDD

100k

R76

GAIN/SLV MATRIX

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

J23

Gain/SLV Select

47.0k

R72

100k

R77

5.60k

R41

GND

GND

GND

GND

GND

GND

GND

16.0k

R36

GND

MSTR-18dB
MSTR-24dB
MSTR-30dB
MSTR-34dB
SLV-18dB
SLV-24dB
SLV-30dB
SLV-34dB

100k

R42

100k

R61

75.0k

R73

51.0k

R74

39.0k

R34

47.0k

R27

51.0k

R21

AVDD

GND

6

4

5

1

3

S2

CMUTE

GND

5V-PU

PVDD

GVDD

3.32

R75

1µF

C66

Using 10uH and 1uF, Cut-off is 50kHz

10µH

L2

10µH

L3

10µH

L4

10µH

L5

1µF

C24

1µF

C35

1µF

C43

1µF

C59

NT2

Net-Tie

AUGNDR

AUGNDR

AUGNDR

AUGNDL

AUGNDL

NT1

Net-Tie

AUGNDL

OUT1_P

OUT1_M

OUT2_P

OUT2_M

TP24

GAIN/SLV

1.00k

R38

0.033µF

C16

GND

47.0k

R1

5V-PU

5V-PU

5V-PU

FRONT END

1.00k

R32

3.30

R55

3.30

R56

3.30

R53

V-EXT

1

2

3

J22

VDD SEL

0

R37

GVDD

TP34

5V-EXT

TP33

5V-PU

5V

0

R3

1000µF

C31

1000µF

C46

TP35

CMUTE

J24

J9

J2

TP13

RESET

VDD-SEL

GVDD

20.0k

R69

39.0k

R71

75.0k

R78

VDD

1

CMUTE

17

IN1_P

8

IN1_M

9

FREQ_ADJ

14

OSCM

12

OSCP

13

GND

5

GND

6

AVDD

21

HEAD

11

IN2_P

15

IN2_M

16

RESET

10

FAULT

4

GAIN/SLV

2

OTW_CLIP

3

GVDD

22

BST1_P

44

BST1_M

43

BST2_M

23

BST2_P

24

GND

42

GND

41

GND

25

GND

26

GND

34

GND

33

OUT1_P

40

OUT1_P

39

OUT1_M

35

OUT2_P

32

OUT2_M

27

OUT2_M

28

PVDD

38

PVDD

37

PVDD

36

PVDD

31

PVDD

30

PVDD

29

GND

18

GND

19

GND

20

GND

7

GND

45

TPA3220DDWR

U4

10.0k

R79

10.0k

R80

GND

5V-PU

Copyright © 2017, Texas Instruments Incorporated

EVM Design Documents

www.ti.com

20

SLAU754A – January 2018 – Revised August 2019

Submit Documentation Feedback

Copyright © 2018–2019, Texas Instruments Incorporated

TPA3220 Evaluation Module

Figure 13. TPA3220 EVM Schematic 2

Содержание TPA3220

Страница 1: ...ated TPA3220 Evaluation Module User s Guide SLAU754A January 2018 Revised August 2019 TPA3220 Evaluation Module This user s guide describes the characteristics operation and use of the TPA3220 evaluation module A complete printed circuit board PCB description schematic diagram and bill of materials BOM are also included ...

Страница 2: ... 4 2 TPA3220 Board Layouts 18 4 3 TPA3220 EVM Schematics 19 4 4 TPA3220EVM Bill of Materials 22 List of Figures 1 Output Configuration BTL 3 2 EVM Board Top Side 4 3 EVM Board Bottom Side 4 4 Output Configuration PBTL 4 Inductors 7 5 EVM Board With Connectors and Jumpers 8 6 Filter Frequency Response 13 7 RESET Circuit 14 8 AIB EVM Connector 14 9 TPA3220 EVM Top Composite Assembly 16 10 TPA3220 EV...

Страница 3: ...TL MODE This section describes the necessary hardware connections configuration and steps to quick start the EVM into BTL mode with stereo audio playing out of two speakers Figure 1 illustrates the BTL mode output configuration Figure 1 Output Configuration BTL 1 1 Required Hardware The following hardware is required for this EVM TPA3220EVM Power supply 5 14 A 12 30 VDC Two 2 8 Ω speaker or resist...

Страница 4: ...ugust 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated TPA3220 Evaluation Module 1 2 Connections and Board Configuration BTL MODE Figure 2 and Figure 3 show the EVM board Figure 2 EVM Board Top Side Figure 3 EVM Board Bottom Side ...

Страница 5: ...rs J10 J11 J20 and J21 to position 1 2 which is labeled as RCA or XLR Jumpers J4 and J12 must be uninstalled for DIFF input B Single Ended Inputs connect one single ended RCA audio input to IN1P J3 and IN2P J18 Install jumpers J10 J11 J20 and J21 to position 1 2 which is labeled as RCA or XLR Jumpers J4 and J12 must be installed for SE input C Audio Interface Board Input Install jumpers J10 J11 J2...

Страница 6: ...nates LEDs D2 and D4 should not be illuminated 2 Bring the EVM out of RESET state by switching RESET S1 to NORMAL You should see the FAULT LED D4 blink once quickly then remain unilluminated 3 Bring the EVM out of MUTE state by switching MUTE S2 to NORMAL 4 Note that the EVM does not have volume control configure your analog input for a reasonable audio level before beginning audio playback 5 Enab...

Страница 7: ... each output mode The TPA3220DDV EVM allows for two output modes Stereo BTL and Mono PBTL 2 1 BTL MODE Stereo 2 Speaker Outputs This mode is the same as described in Quick Start BTL MODE 2 2 PBTL MODE Mono 1 Speaker Output This mode provides one speaker output that is more powerful than each BTL output and is useful when mono audio is to be played or when more power is needed Figure 4 illustrates ...

Страница 8: ...f both OUTx to the one side of the speaker and parallel connection of both OUTx to the other side of the speaker 4 Check to make sure that the power supply is connected to J1 only and the speaker is connected to J9 or J2 only as their colors are the same 5 Input Configuration 1 Differential Inputs connect one differential XLR audio input to DIFF IN1 J14 Install jumpers J10 J11 J20 and J21 to posit...

Страница 9: ...J19 5V PU EN OUT J17 OSC Output No Connection J16 Master or Slave Select Position 3 4 MASTER MODE 2 2 2 Power Up Ensure that required connections and configurations have been checked The TPA3220EVM board can now be powered on 1 Enable the power supply from 12 V to 30 V and ensure that LED D5 illuminates LEDs D2 and D4 should not be illuminated 2 Bring the EVM out of RESET state by switching RESET ...

Страница 10: ...he lower value switching frequencies together results in the fewest cases of interference throughout the AM band The oscillator frequency can be selected by the value of the FREQ_ADJ resistor connected to GND in master mode according to Table 4 Table 4 Frequency Adjust Master Mode Selection J16 FREQ_ADJ J16 Mode Resistor Selected to GND or Pullup PWM Frequency Master MODE 49 9 kΩ 600 kHz Master MO...

Страница 11: ...pins to regular high output impedance audio outputs by removing J7 and J8 puts the TPA3220 into BTL mode 2 x stereo outputs Tying the IN2_M and IN2_P pins to GND by installing J7 and J8 puts the TPA3220 into PBTL mode 1 x mono output This is summarized in Table 6 Table 6 Output Mode and Modulation Mode Selection Input Jumpers J7 and J8 Input Mode Output Configuration Description IN2_M IN2_P OUT OU...

Страница 12: ...l regulator is used these pins are fed internal to the device no external connection is necessary When the internal regulator is OFF these pins need 5 V through the TP or 5 V through J24 as previously mentioned Table 7 Power Supply Summary PVDD V VDD V AVDD and GVDD Internal Regulator Status Note 7 0 to 30 0 5 0 Externally Provided OFF Most Efficient 7 0 to 30 0 7 0 to PVDD No Connection to VDD ON...

Страница 13: ... removing R3 Once R3 is removed 5 V can be fed to only the TPA3220 supplies through TP34 5V EXT and all other 5 V needs can be powered through TP33 5V PU Either approach can be used to measure efficiency but the most accurate numbers will be with the two 5 V supplies separated so the TPA3220 supply voltage is isolated and measured independently of board LEDs reset control and so forth 3 7 LC Respo...

Страница 14: ...ncludes RESET supervision so that the TPA3220 device will remain in reset until all power rails are up and stable The RESET supervisor also ensures that the device will be put into reset if one of the power rails experiences a brown out This circuit combined with the RESET switch S1 help ensure that the TPA3220 can be placed in reset easily as needed or automatically if there is a power supply iss...

Страница 15: ...0 EN and RESET Assert enable and reset control for audio class D EVM active low I 11 Analog IN_A Analog audio input A analog in EVM Master I2S Bus digital in EVM I 12 NC 13 Analog IN_B Analog audio input B analog in EVM Bit Clock I2S Bus digital in EVM I 14 CLIP_OTW Clipping detection overtemperature warning or both from audio class D EVM active low O 15 Analog IN_C Analog audio input C analog in ...

Страница 16: ... Copyright 2018 2019 Texas Instruments Incorporated TPA3220 Evaluation Module 4 EVM Design Documents This section contains the EVM board layouts schematics and bill of materials BOM 4 1 TPA3220 Board Layouts Figure 9 and Figure 10 illustrate the EVM board layouts Figure 9 TPA3220 EVM Top Composite Assembly ...

Страница 17: ...Design Documents 17 SLAU754A January 2018 Revised August 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated TPA3220 Evaluation Module Figure 10 TPA3220 EVM Bottom Composite Assembly ...

Страница 18: ...January 2018 Revised August 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated TPA3220 Evaluation Module 4 2 TPA3220 Board Layouts Figure 11 shows the EVM board dimensions Figure 11 TPA3220 EVM Board Dimensions ...

Страница 19: ...63 1 2 3 J20 IN2 1 2 3 J21 IN2 IN2 _XLR J12 IN2 SE GND GND J4 IN1 SE GND TP17 IN1 TP29 IN1 TP30 IN2 TP31 IN2 1 3 5 6 4 2 7 9 10 8 12 11 14 13 16 15 18 17 20 19 22 21 24 23 26 25 28 27 J28 MH1 MH2 1 2 3 4 GND SHIELD J14 DIFF IN1 MH1 MH2 1 2 3 4 GND SHIELD J15 DIFF IN2 1 2 3 J3 IN1P 1 2 3 J18 IN2P 10 0k R20 IN1 _AIB IN1 _AIB IN2 _AIB IN2 _AIB 3 3V IN1 _RCA XLR IN1 _XLR IN2 _RCA XLR IN2 _XLR IN2 _RCA...

Страница 20: ...10 0k R68 49 9k R15 30 0k R17 47 0k R24 47 0k R28 HEAD CMUTE IN1_P IN1_M IN2_P IN2_M GAIN SLV VDD AVDD 100k R76 GAIN SLV MATRIX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 J23 Gain SLV Select 47 0k R72 100k R77 5 60k R41 GND GND GND GND GND GND GND 16 0k R36 GND MSTR 18dB MSTR 24dB MSTR 30dB MSTR 34dB SLV 18dB SLV 24dB SLV 30dB SLV 34dB 100k R42 100k R61 75 0k R73 51 0k R74 39 0k R34 47 0k R27 51 0k R2...

Страница 21: ...V 1 VIN 2 VIN 3 VIN 4 VOUT 5 VOUT 6 VOUT 7 NC 8 VOUT 9 GND U6 TLV1117 50CDRJR GND 100µF C49 GND 100µF C10 TP27 GND TP28 GND GND TP25 GND TP32 V EXT PVDD 4 99k R7 GND 1 00k R13 V EXT 4 99k R8 OUT 1 NC 2 GND 3 EN 4 NC 5 IN 6 PAD 7 U5 TPS70950DRVR 2 2µF 100V C15 GND GND 5V PU 0 R16 PVDD 1 2 3 J25 5V PU SEL 2 2µF 100V C14 V EXT J19 5V PU EN GND GND 5V VIN 2 VOUT 5 VOUT 6 VOUT 7 NC 8 VIN 3 VIN 4 1 GND ...

Страница 22: ...50 V 10 X7R 0603 0603 C0603C104K5RACTU Kemet C10 C49 2 100uF CAP AL 100 µF 6 3 V 20 0 7 ohm SMD SMT Radial C EEE FK0J101UR Panasonic C11 1 0 01uF CAP CERM 0 01 µF 100 V 10 X7R 0603 0603 06031C103KAT2A AVX C12 1 4700pF CAP CERM 4700 pF 50 V 10 X7R 0603 0603 C0603X472K5RACTU Kemet C16 C27 C29 C52 C54 5 0 033uF CAP CERM 0 033 µF 25 V 10 X7R 0603 0603 GRM188R71E333KA01D Murata C17 C28 C41 C55 C63 C66 ...

Страница 23: ...um Core Ferrite 100 µH 1 5 A 0 165 ohm SMD SMD 7447714101 Wurth Elektronik L2 L3 L4 L5 4 10uH Inductor 10 µH 4 6 A 0 0234 ohm TH 14x9 6mm 7G14J 100M R Sagami Elec Co Ltd L6 1 10uH Inductor Wirewound 10 µH 0 08 A 0 36 ohm SMD 0603 GLFR1608T100M LR TDK Q1 Q2 2 60V MOSFET N CH 60 V 0 17 A SOT 23 SOT 23 2N7002 7 F Diodes Inc R1 R24 R27 R28 R72 5 47 0k RES 47 0 k 1 0 1 W 0603 0603 RC0603FR 0747KL Yageo...

Страница 24: ...t Point Compact Grey TH TestPoint Grey 220mil TH 5123 Keystone TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP18 TP25 TP27 TP28 TP36 16 Test Point Multipurpose Grey TH Grey Multipurpose Testpoint 5128 Keystone TP32 1 Test Point Compact Red TH Red Compact Testpoint 5005 Keystone TP33 TP34 2 Test Point Multipurpose Red TH Red Multipurpose Testpoint 5010 Keystone U1 1 High Voltage 1A Step Down Swit...

Страница 25: ...0 1uF CAP CERM 1 µF 50 V 10 X7R 1206 1206 GRM31MR71H105KA88L Murata FID1 FID2 FID3 FID4 FID5 FID6 0 Fiducial mark There is nothing to buy or mount N A N A N A R7 R8 0 4 99k RES 4 99 k 1 0 125 W 0805 0805 ERJ 6ENF4991V Panasonic R11 R14 R18 R22 0 2 00k RES 2 00 k 1 0 1 W 0603 0603 RC0603FR 072KL Yageo America R13 0 1 00k RES 1 00 k 1 0 125 W 0805 0805 ERJ 6ENF1001V Panasonic R16 R63 R64 R65 R66 0 0...

Страница 26: ...tation Feedback Copyright 2018 2019 Texas Instruments Incorporated Revision History Revision History NOTE Page numbers for previous revisions may differ from page numbers in the current version Changes from Original January 2018 to A Revision Page Removed the Advanced Information banner 1 ...

Страница 27: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Страница 28: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Страница 29: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Страница 30: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Страница 31: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Страница 32: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

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