TPA032D02 Class-D EVM Interconnects
3-25
Details
3.8
TPA032D02 Class-D EVM Interconnects
Table 3–4 shows the correlation between the TPA032D02 class-D amplifier IC
pins, the EVM pins, and the plug-n-play (PNP) platform sockets.
Table 3–4. TPA032D02 Class-D EVM/Plug-N-Play Platform Interconnects
CLASS-D EVM
PLUG-N-PLAY PLATFORM
IC PIN
EVM PIN
FUNCTION ON EVM
PNP SOCKET
FUNCTION ON PLATFORM
8, 9 16, 21, 28,
33, 40
VCC
Power for left channel, right channel,
input, and headphone circuits
VCC
Power from J1 or J2
3, 7, 12, 13, 20,
27, 36, 37, 46,
47
GND
Analog and power ground for EVM,
all pins
GND
Ground for platform from J1 or J2
44
RIN+
Class-D right channel positive input
Right In (line)
Right channel input from J3 or J4
45
RIN–
Class-D right channel inverted input
GND
Ground for platform from J1, J2
38, 39
Rout+
Class-D right channel positive
output
Right Out +
Right channel positive output to J7
or J8
34,35
Rout–
Class-D right channel inverted
output
Right Out –
Right channel negative output to
J7 or J8
5
LIN+
Class-D left channel positive input
Left In (line)
Left channel input from J4 or J5
4
LIN–
Class-D left channel inverted input
GND
Ground for platform from J1, J2
10, 11
Lout+
Class-D left channel positive output
Left Out +
Left channel positive output to J8
or J9
14, 15
Lout–
Class-D left channel inverted output
Left Out –
Left channel negative output to J8
or J9
2
Mute
Mute control external input pin:
active low — selected amplifier
active when held > 2 V
N/C
No connect
1
SD
Shutdown control external input pin:
active low — normal operation when
held > 2 V
Mute
Mute control from JP6 for use
when testing a headphone
amplifier in socket U5 in
conjunction with an EVM in
U2/U3/U4
41
TP4
Fault–1: Logic level fault–1 output
signal. MSB. Open drain.
N/C
No connect
42
TP3
Fault–0: Logic level fault–0 output
signal. LSB. Open drain.
N/C
No connect
–
VDD
Power for EVM TTL logic control
inputs
VDD
Power from J6 or power regulator
installed in platform socket U6
Содержание TPA032D02
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