Texas Instruments SLAU039, Руководство пользователя

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Power Supply
2-3
AD50-EVM Design and Construction
2.2 Power Supply
The AD50-EVM board requires only +5 Vdc; a –5-Vdc supply for some of the
op-amps is generated on the board using a CMOS 7660 charge pump phase-
locked to the frame sync output of the AD50. Phase-locking minimizes the risk
of audible beats between the sampling clock and the 7660 clock. The OSC pin
of the 7660 is coupled to the master FSD with a 22 pF capacitor. This method
allows the 7660 oscillator to free-run when there is no frame sync, ensuring
that the negative power is always maintained, even when the AD50 is held in
reset. The 7660 divides the signal on the OSC pin by 2 internally, ensuring that
the charge pump operates at a 50% duty cycle, even with a grossly asymmetric
input such as that provided by frame sync. Not all negative supply generators
contain a divider. Check before using any other type.
The digital part of the AD50 can be operated at 3.3 V. Users wishing to investi-
gate this should remove R16 and R36 and connect 3.3 V power to L_VD and
R_VD.
2.3 System Clock
When the AD50-EVM is used in standalone mode, in conjunction with a
separate DSP system, a crystal oscillator must be fitted to the socket provided.
A frequency of 10.24 MHz is suggested, as this will allow standard sampling
frequencies such as 10, 16, and 20 kHz to be achieved by programming the
AD50 clock divider and phase-locked loop. Table 2–1 shows the sampling
frequencies that can be selected for a number of master clock frequencies.
Frequencies shown in brackets are above the maximum sampling frequency
specified for the AD50.
In standalone mode the AD50-EVM can be clocked at frequencies up to
22.579 MHz. However, when used in conjunction with the DSK+ the upper
frequency is limited by the maximum clock rate of the TMS320C542 DSP
device. The 10.24 MHz oscillator supplied with the AD50-EVM will drive the
TMS320C542 on the DSK+ at 40.96 MHz, which is only slightly higher than its
maximum operating frequency of 40.00 MHz. However, at room temperature
this should not cause any problems, because the TMS320C542 is tested by
TI at 40.00 MHz over the temperature range 0-70
_
C. The authors have
successfully operated a DSK+ in conjunction with an AD50-EVM at MCLK
frequencies from 4 MHz to 13 MHz at room temperature, but this may not work
with all DSK+ units. Alternatively, the DSK+ and AD50-EVM clocks can be
separated by removing resistor R80 from the AD50-EVM board and a suitable
oscillator installed on each board. (If this modification is made, 3 and 4 channel
modes will not work correctly because all the AD50s must have an identical
MCLK. Removing R80 prevents the clock from being transmitted between the
boards.)
It is important to ensure that only one oscillator is used in the system (except
as described above), otherwise results will be unpredictable. No damage will
be caused, however, as current limiting resistors are provided on the output
of each oscillator. Electrically it makes no difference whether the oscillator is
fitted to the DSK+, or to the first or second AD50-EVM board.